PSB21150HV14XP Infineon Technologies, PSB21150HV14XP Datasheet - Page 92
PSB21150HV14XP
Manufacturer Part Number
PSB21150HV14XP
Description
Manufacturer
Infineon Technologies
Datasheet
1.PSB21150HV14XP.pdf
(270 pages)
Specifications of PSB21150HV14XP
Number Of Line Interfaces
1
Control Interface
HDLC
Lead Free Status / Rohs Status
Compliant
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3.6.2
INFO 1 has to be transmitted as long as INFO 0 is received.
INFO 0 has to be transmitted thereafter as long as no valid INFO (INFO 2 or INFO 4) is
received.
After reception of INFO 2 or INFO 4 transmission of INFO 3 has to be started.
Data can be transmitted if INFO 4 has been received.
Figure 47
Note: RINF and XINF are Receive- and Transmit-INFOs of register TR_STA.
Data Sheet
µC Interface
TDDIS='1',
TDDIS='0'
TDDIS='1',
Activation Initiated by the Terminal
T1
T2
T3
Example of Activation/Deactivation initiated by the Terminal (TE).
Activation/Deactivation Completely Under Software Control
TE
TE
TE
XINF='010'
RINF='01'
XINF='000'
RINF='10'
XINF='011'
RINF='11'
RINF='00'
XINF='000'
: 2 to 6 frames (0.5 ms to 1.5 ms)
:
:
2 frames (0.5 ms)
4 frames (1 ms)
TE
T1
T2
T3
TE
TE
TE
S/T Interface
INFO 0
INFO 1
INFO 2
INFO 0
INFO 3
INFO 4
INFO 0
INFO 0
INFO 0
92
Description of Functional Blocks
NT
PSB/PSF 21150
act_deac_te-ext_s.vsd
2003-01-30
IPAC-X
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