N25Q064A13EF640F Micron Technology Inc, N25Q064A13EF640F Datasheet - Page 120

• Manufacturer Part Number: N25Q064A13EF640F
• Manufacturer: Micron Technology Inc

Specifications of N25Q064A13EF640F

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Instructions
9.3.19
9.3.20
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DQ0
DQ3
DQ1
DQ2
S
Figure 91. Read Flag Status Register instruction sequence QIO-SPI
C
Clear Flag Status Register
The Clear Flag Status Register (CLFSR) instruction reset the error Flag Status Register bits
(Erase Error bit, Program Error bit, VPP Error bit, Protection Error bit). It is not necessary to
set the WEL bit before the Clear Flag Status Register instruction is executed. The WEL bit
will be unchanged after this command is executed.
Figure 92. Clear Flag Status Register instruction sequence QIO-SPI
Read NV Configuration Register
The Read Non Volatile Configuration Register (RDNVCR) instruction allows the Non Volatile
Configuration Register to be read.
Mode 3
Mode 0
Instruction
0
1
DQ1
DQ0
DQ2
DQ3
S
C
5
4
6
7
2
1
0
2
3
3
5
4
6
7
4
Instruction
1
0
2
3
0
5
1
5
4
6
7
6
Micron Technology, Inc., reserves the right to change products or specifications without notice.
1
0
2
3
7
Flag Status Register Out
5
4
6
7
8
1
0
3
9 10
2
5
4
7
6
11 12 13 14 15
0
1
3
2
4
5
7
6
0
1
3
2
©2010 Micron Technology, Inc. All rights reserved.
4
5
7
6
0
1
3
2
N25Q064 - 3 V