N25Q064A13EF640F Micron Technology Inc, N25Q064A13EF640F Datasheet - Page 17
N25Q064A13EF640F
Manufacturer Part Number
N25Q064A13EF640F
Description
Manufacturer
Micron Technology Inc
Datasheet
1.N25Q064A13EF640F.pdf
(150 pages)
Specifications of N25Q064A13EF640F
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N25Q064 - 3 V
2.7
2.8
Using the Extended SPI protocol the QIFP, QIEFP and the QIO-SPI Program/Erase
instructions, it is still possible to use the VPP additional power supply to speed up internal
operations. However, to enable this possibility it is necessary to set bit 3 of the Volatile
Enhanced Configuration Register to 0.
In this case the W/VPP/DQ2 pin is used as an I/O pin until the end of the instruction
sequence. After the last input data is shifted in, the application should apply VPP voltage to
W/VPP/DQ2 within 200 ms to speed up the internal operations. If the VPP voltage is not
applied within 200 ms the Program/Erase operations start with standard speed.
The default value of the VECR bit 3 is 1, and the VPP functionality for Quad I/O modify
instruction is disabled.
V
V
V
V
CC
SS
CC
SS
is the reference for the V
is the supply voltage.
ground
supply voltage
CC
supply voltage.
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2010 Micron Technology, Inc. All rights reserved.
Signal descriptions
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