SAK-XC167CI-32F40FBB-A Infineon Technologies, SAK-XC167CI-32F40FBB-A Datasheet - Page 23

• Manufacturer Part Number: SAK-XC167CI-32F40FBB-A
• Description: Microcontrollers (MCU) 256KB FLASH 12KB RAM 2xASC 2xSSC I2C
• Manufacturer: Infineon Technologies

Specifications of SAK-XC167CI-32F40FBB-A

• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 12 KB
• Interface Type: 2xASC, 2xSSC, 1xI2C
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 103
• Number Of Timers: 11
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: PG-TQFP-144
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / Rohs Status: Details
• Other names: KX167CI32F40FBBAXT

3
The architecture of the XC167 combines advantages of RISC, CISC, and DSP
processors with an advanced peripheral subsystem in a very well-balanced way. In
addition, the on-chip memory blocks allow the design of compact systems-on-silicon with
maximum performance (computing, control, communication).
The on-chip memory blocks (program code-memory and SRAM, dual-port RAM, data
SRAM) and the set of generic peripherals are connected to the CPU via separate buses.
Another bus, the LXBus, connects additional on-chip resources as well as external
resources (see
This bus structure enhances the overall system performance by enabling the concurrent
operation of several subsystems of the XC167.
The following block diagram gives an overview of the different on-chip components and
of the advanced, high bandwidth internal bus structure of the XC167.
Figure 3
Data Sheet
X T A L
P 20
C hannels
C lo ck G e n e ra tio n
8/10-B it
ADC
D e b u g S u p p o rt
Functional Description
O sc / PLL
16
6
O CDS
P ort 9
128 KB ytes
ProgM em
Block Diagram
PSRAM
Figure
6
F la sh
G PT
P 7
T 2
T 3
T 4
T 5
T 6
4
P ort 6
(U S A R T )
ASC0
B R G en
3).
RTC
8
(U S A R T )
ASC1
W DT
B R G en
P ort 5
16
SSC0
B R G en
(S P I)
P ort 4
SSC1
C166SV2-Core
8
B R G en
(S P I)
Interrupt & PEC
21
DPRAM
CPU
P ort 3
CC1
T 0
T 1
15
CC2
T 7
T 8
P ort 2
P e rip he ral D ata B us
Interrupt B us
8
B R G en
IIC
Functional Description
P O R T 1
16
CC6
T 12
T 13
X B U S C on trol
E xtern al B u s
DSRAM
C ontrol
XC167CI-32F
EBC
M C B 04323_x7.vsd
Derivatives
V1.1, 2006-08
P O R T 0
Tw in
CAN
A
16
B