SAK-XC167CI-32F40FBB-A Infineon Technologies, SAK-XC167CI-32F40FBB-A Datasheet - Page 50

• Manufacturer Part Number: SAK-XC167CI-32F40FBB-A
• Description: Microcontrollers (MCU) 256KB FLASH 12KB RAM 2xASC 2xSSC I2C
• Manufacturer: Infineon Technologies

Specifications of SAK-XC167CI-32F40FBB-A

• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 12 KB
• Interface Type: 2xASC, 2xSSC, 1xI2C
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 103
• Number Of Timers: 11
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: PG-TQFP-144
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / Rohs Status: Details
• Other names: KX167CI32F40FBBAXT

Summary of Features
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Note: When a CAN node has the interface lines assigned to Port 4, the segment address
3.14
The integrated IIC Bus Module handles the transmission and reception of frames over
the two-line IIC bus in accordance with the IIC Bus specification. The IIC Module can
operate in slave mode, in master mode or in multi-master mode. It can receive and
transmit data using 7-bit or 10-bit addressing. Up to 4 send/receive data bytes can be
stored in the extended buffers.
Several physical interfaces (port pins) can be established under software control. Data
can be transferred at speeds up to 400 kbit/s.
Two interrupt nodes dedicated to the IIC module allow efficient interrupt service and also
support operation via PEC transfers.
Note: The port pins associated with the IIC interfaces must be switched to open drain
Data Sheet
CAN functionality according to CAN specification V2.0 B active
Data transfer rate up to 1 Mbit/s
Flexible and powerful message transfer control and error handling capabilities
Full-CAN functionality and Basic CAN functionality for each message object
32 flexible message objects
– Assignment to one of the two CAN nodes
– Configuration as transmit object or receive object
– Concatenation to a 2-, 4-, 8-, 16-, or 32-message buffer with FIFO algorithm
– Handling of frames with 11-bit or 29-bit identifiers
– Individual programmable acceptance mask register for filtering for each object
– Monitoring via a frame counter
– Configuration for Remote Monitoring Mode
Up to eight individually programmable interrupt nodes can be used
CAN Analyzer Mode for bus monitoring is implemented
output on Port 4 must be limited. CS lines can be used to increase the total amount
of addressable external memory.
mode, as required by the IIC specification.
IIC Bus Module
48
Functional Description
XC167CI-32F
Derivatives
V1.1, 2006-08