SAK-XC167CI-32F40FBB-A Infineon Technologies, SAK-XC167CI-32F40FBB-A Datasheet - Page 25

• Manufacturer Part Number: SAK-XC167CI-32F40FBB-A
• Description: Microcontrollers (MCU) 256KB FLASH 12KB RAM 2xASC 2xSSC I2C
• Manufacturer: Infineon Technologies

Specifications of SAK-XC167CI-32F40FBB-A

• Data Bus Width: 16 bit
• Program Memory Type: Flash
• Program Memory Size: 256 KB
• Data Ram Size: 12 KB
• Interface Type: 2xASC, 2xSSC, 1xI2C
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 103
• Number Of Timers: 11
• Operating Supply Voltage: 5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• Package / Case: PG-TQFP-144
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 16 Channel
• Lead Free Status / Rohs Status: Details
• Other names: KX167CI32F40FBBAXT

RH7) so-called General Purpose Registers (GPRs).
The upper 256 bytes of the DPRAM are directly bitaddressable. When used by a GPR,
any location in the DPRAM is bitaddressable.
1024 bytes (2 × 512 bytes) of the address space are reserved for the Special Function
Register areas (SFR space and ESFR space). SFRs are wordwide registers which are
used for controlling and monitoring functions of the different on-chip units. Unused SFR
addresses are reserved for future members of the XC166 Family. Therefore, they should
either not be accessed, or written with zeros, to ensure upward compatibility.
In order to meet the needs of designs where more memory is required than is provided
on chip, up to 12 Mbytes (approximately, see
be connected to the microcontroller. The External Bus Interface also provides access to
external peripherals.
Table 3
Address Area
Flash register space
Reserved (Access trap) FE’0000
Reserved for EPSRAM F8’1800
Emul. Program SRAM
Reserved for PSRAM
Program SRAM
Reserved for program
memory
Program Flash
Reserved
External memory area
External IO area
TwinCAN registers
External memory area
Data RAMs and SFRs
External memory area
1) Accesses to the shaded areas generate external bus accesses.
2) The areas marked with “<” are slightly smaller than indicated, see column “Notes”.
3) Not defined register locations return a trap code.
4) The Emulation PSRAM (EPSRAM) realizes a 2
Data Sheet
XC167 Memory Map
5)
4)
Start Loc.
FF’F000
F8’0000
E0’1800
E0’0000
C4’0000
C0’0000
BF’0000
40’0000
20’0800
20’0000
01’0000
00’8000
00’0000
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
1)
End Loc.
FF’FFFF
FF’EFFF
FD’FFFF
F8’17FF
F7’FFFF
E0’17FF
DF’FFFF
C3’FFFF
BF’FFFF
BE’FFFF
3F’FFFF
20’07FF
1F’FFFF
00’FFFF
00’7FFF
nd
access path to the PSRAM with a different timing.
23
Table
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
Area Size
4 Kbytes
< 0.5 Mbytes Minus Flash
378 Kbytes
6 Kbytes
< 1.5 Mbytes Minus PSRAM
6 Kbytes
< 2 Mbytes
256 Kbytes
64 Kbytes
< 8 Mbytes
< 2 Mbytes
2 Kbytes
< 2 Mbytes
32 Kbytes
32 Kbytes
3) of external RAM and/or ROM can
2)
Functional Description
Notes
3)
registers
–
2
Maximum
Minus Flash
–
–
Minus reserved
seg.ment.
Minus TwinCAN
–
Minus segment 0
Partly used
–
nd
way to PSRAM
XC167CI-32F
Derivatives
V1.1, 2006-08