ADV7177KS-REEL Analog Devices Inc, ADV7177KS-REEL Datasheet - Page 23

IC DAC VIDEO NTSC 3-CH 44MQFP

ADV7177KS-REEL

Manufacturer Part Number
ADV7177KS-REEL
Description
IC DAC VIDEO NTSC 3-CH 44MQFP
Manufacturer
Analog Devices Inc
Type
Video Encoderr
Datasheet

Specifications of ADV7177KS-REEL

Rohs Status
RoHS non-compliant
Applications
Set-Top Boxes, TV
Voltage - Supply, Analog
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
44-MQFP, 44-PQFP
Adc/dac Resolution
9b
Screening Level
Commercial
Package Type
MQFP
Pin Count
44
Voltage - Supply, Digital
-
Lead Free Status / RoHS Status
Not Compliant
Mode 2: Master Option HSYNC , VSYNC , BLANK
Timing Register 0 TR0 = X X X X X 1 0 1
In this mode, the ADV7177/ADV7178 can generate horizontal and vertical SYNC signals. A coincident low transition of both HSYNC
and VSYNC inputs indicates the start of an odd field. A VSYNC low transition when HSYNC is high indicates the start of an even field.
The BLANK signal is optional. When the BLANK input is disabled, the ADV7177/ADV7178 automatically blank all normally blank lines
as per the BT-470 specification. Mode 2 is illustrated in Figure 21 (NTSC) and Figure 22 (PAL). Figure 23 illustrates the HSYNC , BLANK ,
and VSYNC for an even-to-odd field transition relative to the pixel data. Figure 24 illustrates the HSYNC , BLANK , and VSYNC for an
odd-to-even field transition relative to the pixel data.
HSYNC
BLANK
VSYNC
PIXEL
DATA
HSYNC
BLANK
VSYNC
PIXEL
DATA
PAL = 12 × CLOCK/2
NTSC = 16 × CLOCK/2
PAL = 12 × CLOCK/2
NTSC = 16 × CLOCK/2
Figure 23. Timing Mode 2, Even-to-Odd Field Transition, Master/Slave
Figure 24. Timing Mode 2, Odd-to-Even Field Transition, Master/Slave
PAL = 132 × CLOCK/2
NTSC = 122 × CLOCK/2
Rev. C | Page 23 of 44
PAL = 132 × CLOCK/2
NTSC = 122 × CLOCK/2
PAL = 864 × CLOCK/2
NTSC = 858 × CLOCK/2
Cb
Y
Cr
Y
Cb
Cb
Y
ADV7177/ADV7178
Cr

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