ADV7177KS-REEL Analog Devices Inc, ADV7177KS-REEL Datasheet - Page 28

• Manufacturer Part Number: ADV7177KS-REEL
• Description: IC DAC VIDEO NTSC 3-CH 44MQFP
• Manufacturer: Analog Devices Inc
• Type: Video Encoderr

Specifications of ADV7177KS-REEL

• Rohs Status: RoHS non-compliant
• Applications: Set-Top Boxes, TV
• Voltage - Supply, Analog: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Package / Case: 44-MQFP, 44-PQFP
• Adc/dac Resolution: 9b
• Screening Level: Commercial
• Package Type: MQFP
• Pin Count: 44
• Voltage - Supply, Digital: -
• Lead Free Status / RoHS Status: Not Compliant

ADV7177/ADV7178
Output Select (MR06)
This bit specifies if the part is in composite video or RGB/YUV
mode. Note that the main composite signal is still available in
RGB/YUV mode.
MODE REGISTER 1 MR1 (MR17–MR10)
Address (SR4–SR0) = 01H
Figure 33 shows the various operations under the control of
Mode Register 1. This register can be read from as well as
written to.
MR1 BIT DESCRIPTION
Interlaced Mode Control (MR10)
This bit is used to set up the output to interlaced or noninter-
laced mode. This mode is relevant only when the part is in
composite video mode.
Closed Captioning Field Selection (MR12–MR11)
These bits control the fields on which closed captioning data is
displayed; closed captioning information can be displayed on an
odd field, even field, or both fields.
DAC Control (MR15–MR13)
These bits can be used to power down the DACs to reduce the
power consumption of the ADV7177/ADV7178 if any of the
DACs are not required in the application.
BE WRITTEN TO
ZERO SHOULD
MR17
0
1
COLOR BAR
THIS BIT
CONTROL
MR07
DISABLE
ENABLE
MR17
MR06
0
1
MR07
OUTPUT SELECT
BE WRITTEN TO
ONE SHOULD
YC OUTPUT
RGB/YUV OUTPUT
THIS BIT
MR16
MR16
MR15
MR06
0
1
DAC CONTROL
COMPOSITE
MR05
NORMAL
POWER-DOWN
0
1
RGB SYNC
MR15
MR14
DISABLE
ENABLE
MR05
Figure 32. Mode Register 0 (MR0)
0
1
Figure 33. Mode Register 1 (MR1)
DAC CONTROL
MR04
0
0
1
1
LUMINANCE FILTER CONTROL
NORMAL
POWER-DOWN
LUMA
Rev. C | Page 28 of 44
MR14
MR03
0
1
0
1
MR13
MR04
0
1
DAC CONTROL
LOW-PASS FILTER (A)
NOTCH FILTER
EXTENDED MODE
LOW-PASS FILTER (B)
CHROMA
NORMAL
POWER-DOWN
MR13
Color Bar Control (MR17)
This bit can be used to generate and output an internal color-
bar test pattern. The color-bar configuration is 100/7.5/75/7.5
for NTSC and 100/0/75/0 for PAL. Note that when color bars
are enabled, the ADV7177/ADV7178 are configured in a master
timing mode as per the one selected by bits TR01 and TR02.
SUBCARRIER FREQUENCY REGISTER 3–0
FSC3–FSC0
Address [SR4–SR0] = 05H–02H
These 8-bit-wide registers are used to set up the subcarrier
frequency. The value of these registers is calculated by using the
following equation, in which the asterisk (*) means rounded to
the nearest integer:
For example, in NTSC mode
Note that on power-up, FSC Register 0 is set to 16h. A value of
1F as derived above is recommended.
MR03
Subcarrier
No
MR12
MR02
0
0
1
1
.
PEDESTAL CONTROL
of
0
1
CLOSED CAPTIONING
MR12
MR11
FIELD SELECTION
Subcarrier
0
1
0
1
No
PEDESTAL OFF
PEDESTAL ON
MR02
.
Frequency
NO DATA OUT
ODD FIELD ONLY
EVEN FIELD ONLY
DATA OUT
(BOTH FIELDS)
of
27
MR01
MR11
0
0
1
1
MHz
Frequency
STANDARD SELECTION
MR10
MR00
0
1
INTERLACED MODE
MR01
OUTPUT VIDEO
0
1
0
1
Value
Clock
INTERLACED
NONINTERLACED
CONTROL
NTSC
PAL (B, D, G, H, I)
PAL (M)
RESERVED
MR10
Values
Cycles
=
227
1716
MR00
5 .
in
in
×
One
One
2
32
Video
Line
=
569408542
of
Line
Video
Line
d
=
×
21
2
F
32
07
*
C
1
Fh