AD9979BCPZ Analog Devices Inc, AD9979BCPZ Datasheet - Page 41

IC PROCESSOR CCD 14BIT 48-LFCSP

AD9979BCPZ

Manufacturer Part Number
AD9979BCPZ
Description
IC PROCESSOR CCD 14BIT 48-LFCSP
Manufacturer
Analog Devices Inc
Type
CCD Signal Processor, 14-Bitr
Datasheet

Specifications of AD9979BCPZ

Input Type
Logic
Output Type
Logic
Interface
3-Wire Serial
Current - Supply
48mA
Mounting Type
Surface Mount
Package / Case
48-LFCSP
Supply Voltage Range
1.6V To 2V, 1.6V To 3.6V, 2.7V To 3.6V
Operating Temperature Range
-25°C To +85°C
Digital Ic Case Style
LFCSP
No. Of Pins
48
Svhc
No SVHC (18-Jun-2010)
Package /
RoHS Compliant
Ic Function
14-bit CCD Signal Processor With Precision Timing Core
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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LAYOUT OF INTERNAL REGISTERS
The AD9979 address space is divided into two different register
areas, as illustrated in Figure 58. In the first area, Address 0x000 to
Address 0x7FF contain the registers for the AFE, miscellaneous
functions, VD/HD parameters, input/output control, mode
control, timing core, test, and update control functions. The
second area of the address space, beginning at Address 0x800,
consists of the registers for the H-pattern groups and fields.
This is a configurable set of register space; the user can decide
how many H­pattern groups and fields are used in a particular
design. The AD9979 supports up to 32 H-patterns.
Register 0x28 specifies the total number of H-pattern groups.
The starting address for the H-pattern group registers is always
0x800, and the starting address for the field registers is determined
by the number of H-pattern groups, and it is equal to 0x800
plus the number of H-pattern groups times 16. Each H-pattern
group and field occupies 16 register addresses.
ADDR 0x000
ADDR 0x7FF
NOTES
1. THE H-PATTERN GROUP AND FIELD REGISTERS MUST OCCUPY A CONTINUOUS BLOCK OF ADDRESSES.
MISCELLANEOUS FUNCTION REGISTERS
UPDATE CONTROL REGISTERS
MODE CONTROL REGISTERS
INVALID—DO NOT ACCESS
TIMING CORE REGISTERS
FIXED REGISTER AREA
VD/HD REGISTERS
TEST REGISTERS
AFE REGISTERS
I/O REGISTERS
ADDR 0x800
ADDR 0x830
ADDR 0x850
MAX 0xFFF
Figure 59. Example Register Configuration
Figure 58. Layout of AD9979 Registers
Rev. C | Page 41 of 56
(16 × 3 = 48 REGISTERS)
(16 × 2 = 32 REGISTERS)
3 H-PATTERN GROUPS
UNUSED MEMORY
HPAT START 0x800
2 FIELDS
FIELD START
It is important to note that the H-pattern group and field
registers must always occupy a continuous block of addresses.
Figure 59 shows an example using three H-pattern groups and
two fields. The starting address for the H-pattern groups is
always 0x800. Because HPATNUM is set to 3, the H-pattern
groups occupy 48 address locations, that is, 16 registers times
3 H-pattern groups. The starting address of the field registers
for this example is 0x830, or 0x800 plus 48 (decimal). Note the
decimal value must be converted to a hexadecimal number
before adding it to 0x800.
The AD9979 address space contains many unused addresses.
Undefined addresses between Address 0x00 and Address 0xFF
must not be written to; otherwise, the AD9979 can operate
incorrectly. Continuous register writes needs to be performed
carefully to avoid writing to undefined registers.
MAX 0xFFF
CONFIGURABLE REGISTER AREA
H-PATTERN GROUPS
FIELDS
AD9979

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