AD9979BCPZ Analog Devices Inc, AD9979BCPZ Datasheet - Page 43

• Manufacturer Part Number: AD9979BCPZ
• Description: IC PROCESSOR CCD 14BIT 48-LFCSP
• Manufacturer: Analog Devices Inc
• Type: CCD Signal Processor, 14-Bitr

Specifications of AD9979BCPZ

• Input Type: Logic
• Output Type: Logic
• Interface: 3-Wire Serial
• Current - Supply: 48mA
• Mounting Type: Surface Mount
• Package / Case: 48-LFCSP
• Supply Voltage Range: 1.6V To 2V, 1.6V To 3.6V, 2.7V To 3.6V
• Operating Temperature Range: -25°C To +85°C
• Digital Ic Case Style: LFCSP
• No. Of Pins: 48
• Svhc: No SVHC (18-Jun-2010)
• Package /: RoHS Compliant
• Ic Function: 14-bit CCD Signal Processor With Precision Timing Core
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

COMPLETE REGISTER LISTING
All addresses and default values are expressed in hexadecimal. When an address contains less than 28 data bits, all remaining bits must be
written as 0s.
Table 24. AFE Registers
Address
00
01
02
03
04
05
06
Data Bit
Content
[1:0]
[2]
[3]
[5:4]
[6]
[7]
[9:8]
[16:10]
[27:17]
[1:0]
[2]
[3]
[4]
[27:5]
[0]
[27:1]
[23:0]
[27:24]
[1:0]
[27:2]
[9:0]
[27:10]
[9:0]
[27:10]
Default
Value
3
1
1
0
0
0
0
0
0
0
0
1
0
FFFFFF
1
F
1EC
Update
Type
SCK
SCK
VD
VD
VD
Name
STANDBY
REFBUF_PWRDN
CLAMPENABLE
TESTMODE
PBLK_LVL
DCBYP
CDSMODE
TESTMODE
Unused
TESTMODE
GRAYENCODE
TESTMODE
TESTMODE
Unused
TESTMODE
Unused
TESTMODE
Unused
CDSGAIN
Unused
VGAGAIN
Unused
CLAMPLEVEL
Unused
Rev. C | Page 43 of 56
Standby modes.
0 = normal operation (full power).
1 = reference standby mode.
2 = total shutdown mode (lowest power).
3 = total shutdown mode (lowest power).
Reference buffer for REFT and REFB power control.
0 = REFT/REFB internally driven.
1 = REFT/REFB not driven.
Clamp enable control.
0 = disable black clamp.
1 = enable black clamp.
Test operation only. Set to 0.
PBLK level control.
0 = blank to 0.
1 = blank to clamp level.
DC restore circuit control.
0 = enable dc restore circuit during PBLK.
1 = bypass dc restore circuit during PBLK.
CDS operation.
0 = normal (inverting) CDS mode.
1 = sample/hold amplifier (SHA) mode.
2 = positive (noninverting) CDS mode.
3 = invalid. Do not use.
Test operation only. Set to 0.
Test operation only. Set to 0.
Gray coding ADC outputs.
0 = disable.
1 = enable.
Test operation only. Set to 0.
Test operation only. Set to 0.
Test operation only. Set to 0.
Test operation only. Set to FFFFFF.
CDS gain setting.
0 = −3 dB.
1 = 0 dB (default).
2 = +3 dB.
3 = +6 dB.
VGA gain. 6 dB to 42 dB in 0.035 dB per step.
Optical black clamp level; 0 LSB to 1023 LSB (1 LSB per step).
Description
Set unused bits to 0.
Set unused bits to 0.
Set unused bits to 0.
Set unused bits to 0.
Set unused bits to 0.
Set unused bits to 0.
Set unused bits to 0.
AD9979