PI7C8150ANDE Pericom Semiconductor, PI7C8150ANDE Datasheet - Page 85

• Manufacturer Part Number: PI7C8150ANDE
• Description: IC PCI-PCI BRIDGE 2PORT 256-PBGA
• Manufacturer: Pericom Semiconductor

Specifications of PI7C8150ANDE

• Applications: *
• Interface: *
• Voltage - Supply: *
• Package / Case: 256-PBGA
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

06-0057
14.1.24
14.1.25
14.1.26
14.1.27
14.1.28
I/O LIMIT ADDRESS UPPER 16-BITS REGISTER – OFFSET 30h
ECP POINTER REGISTER – OFFSET 34h
INTERRUPT LINE REGISTER – OFFSET 3Ch
INTERRUPT PIN REGISTER – OFFSET 3Ch
BRIDGE CONTROL REGISTER – OFFSET 3Ch
Bit
31:0
Bit
7:0
Bit
7:0
Bit
15:8
Bit
16
17
Function
I/O Limit
Address, Upper
16-bits [31:16]
Function
Enhanced
Capabilities Port
Pointer
Function
Interrupt Line
Function
Interrupt Pin
Function
Parity Error
Response
S_SERR_L
enable
Type
R/W
Type
R/O
Type
R/W
Type
R/O
Type
R/W
R/W
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Description
Defines the upper 16-bits of a 32-bit top address of an address range
for the bridge to determine when to forward I/O transactions from
one interface to the other.
Reset to 0
Description
Enhanced capabilities port offset pointer. Read as DCh to indicate
that the first item resides at that configuration offset.
Description
For POST to program to FFh, indicating that the PI7C8150A does not
implement an interrupt pin.
Description
Interrupt pin not supported on the PI7C8150A
Description
Controls the bridge’s response to parity errors on the secondary
interface.
0: ignore address and data parity errors on the secondary interface
1: enable parity error reporting and detection on the secondary
interface
Reset to 0
Controls the forwarding of S_SERR_L to the primary interface.
0: disable the forwarding of S_SERR_L to primary interface
1: enable the forwarding of S_SERR_L to primary interface
Reset to 0
2-PORT PCI-TO-PCI BRIDGE
APRIL 2006 – Revision 1.1
PI7C8150A