TLE8102SGXT Infineon Technologies, TLE8102SGXT Datasheet - Page 23

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TLE8102SGXT

Manufacturer Part Number
TLE8102SGXT
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of TLE8102SGXT

Switch Type
Low Side
Power Switch Family
TLE8102SG
Power Switch On Resistance
180mOhm
Output Current
5A
Number Of Outputs
Dual
Mounting
Surface Mount
Supply Current
5mA
Package Type
DSO
Operating Temperature (min)
-40C
Operating Temperature (max)
150C
Operating Temperature Classification
Automotive
Pin Count
12
Lead Free Status / Rohs Status
Compliant
5.6
The diagnosis and control interface is based on a serial peripheral interface (SPI).
The SPI is a full duplex synchronous serial slave interface, which uses four lines: SO, SI, SCLK and
transferred by the lines SI and SO at the data rate given by SCLK. The falling edge of
of a data access. Data is sampled in on line SI at the falling edge of SCLK and shifted out on line SO at the rising
edge of SCLK. Each access must be terminated by a rising edge of
capability.
Figure 19
The SPI protocol is described in
chip is programmed via SPI to enter sleep mode.
5.6.1
CS - Chip Select: The system micro controller selects the TLE8102SG by means of the CS pin. Whenever the
pin is in low state, data transfer can take place. When CS is in high state, any signals at the SCLK and SI pins are
ignored and SO is forced into a high impedance state.
CS High to Low transition:
CS Low to High transition:
SCLK - Serial Clock: This input pin clocks the internal shift register. The serial input (SI) transfers data into the
shift register on the falling edge of SCLK while the serial output (SO) shifts diagnostic information out on the rising
edge of the serial clock. It is essential that the SCLK pin is in low state whenever chip select CS makes any
transition.
SI - Serial Input: Serial input data bits are shifted in at this pin, the most significant bit first. SI information is read
on the falling edge of SCLK. The 8 bit input data consist of two parts (control and data). Please refer to
for further information.
Data Sheet
The diagnosis information is transferred into the shift register.
Command decoding is only done after the falling edge of CS if the command is valid.
Data from shift register is transferred into the input matrix register.
The diagnosis flags are cleared.
SCLK
SO
time
CS
SI
SPI Interface
Serial Peripheral Interface
SPI Signal Description
MSB
MSB
Section
6
6
6. All registers are reset to default values after power-on reset or if the
5
5
23
4
4
Electrical and Functional Description of Blocks
Smart Dual Channel Powertrain Switch
3
3
CS
. The interface provides daisy chain
2
2
1
1
CS
indicates the beginning
LSB
V1.3, 2008-04-24
LSB
TLE8102SG
CS
Section 6
. Data is

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