LPC1786FBD208,551 NXP Semiconductors, LPC1786FBD208,551 Datasheet - Page 44

• Manufacturer Part Number: LPC1786FBD208,551
• Description: Processors - Application Specialized CORTEX-M3 256KB FL 80KB SRAM 4KB EE USB
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1786FBD208,551

• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 120MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, LCD, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 165
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 80K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LQFP
• Lead Free Status / Rohs Status: Details
• Other names: 935291855551

NXP Semiconductors
LPC178X_7X
Objective data sheet
7.8.1 Features
7.8.2 Interrupt sources
7.10 External memory controller
7.8 Nested Vectored Interrupt Controller (NVIC)
7.9 Pin connect block
The NVIC is an integral part of the Cortex-M3. The tight coupling to the CPU allows for low
interrupt latency and efficient processing of late arriving interrupts.
Each peripheral device has one interrupt line connected to the NVIC but may have several
interrupt flags. Individual interrupt flags may also represent more than one interrupt
source.
Any pin on port 0 and port 2 regardless of the selected function can be programmed to
generate an interrupt on a rising edge, a falling edge, or both.
The pin connect block allows selected pins of the microcontroller to have more than one
function. Configuration registers control the multiplexers to allow connection between the
pin and the on-chip peripherals.
Peripherals should be connected to the appropriate pins prior to being activated and prior
to any related interrupt(s) being enabled. Activity of any enabled peripheral function that is
not mapped to a related pin should be considered undefined.
Most pins can also be configured as open-drain outputs or to have a pull-up, pull-down, or
no resistor enabled.
Remark: Supported memory size and type and EMC bus width vary for different parts
(see
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Controls system exceptions and peripheral interrupts.
In the LPC178x/7x, the NVIC supports 41 vectored interrupts.
32 programmable interrupt priority levels, with hardware priority level masking.
Relocatable vector table.
Non-Maskable Interrupt (NMI).
Software interrupt generation.
Table
2). The EMC pin configuration for each part is shown in
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 27 May 2011
32-bit ARM Cortex-M3 microcontroller
LPC178x/7x
Table
© NXP B.V. 2011. All rights reserved.
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