LFE3-35EA-8FN672I Lattice, LFE3-35EA-8FN672I Datasheet - Page 100

IC FPGA 33.3K LUTS 310I/O FN672

LFE3-35EA-8FN672I

Manufacturer Part Number
LFE3-35EA-8FN672I
Description
IC FPGA 33.3K LUTS 310I/O FN672
Manufacturer
Lattice
Series
ECP3r

Specifications of LFE3-35EA-8FN672I

Number Of Logic Elements/cells
33000
Number Of Labs/clbs
4125
Total Ram Bits
1358848
Number Of I /o
310
Number Of Gates
-
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
672-BBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
220-1163
Lattice Semiconductor
Figure 3-18. XAUI Sinusoidal Jitter Tolerance Mask
Note: The sinusoidal jitter tolerance is measured with at least 0.37UIpp of Deterministic
jitter (Dj) and the sum of Dj and Rj (random jitter) is at least 0.55UIpp. Therefore, the
sum of Dj, Rj and Sj (sinusoidal jitter) is at least 0.65UIpp (Dj = 0.37, Rj = 0.18, Sj = 0.1).
8.5UI
20dB/dec
SJ Frequency
3-47
Data_rate/
1667
DC and Switching Characteristics
20MHz
LatticeECP3 Family Data Sheet
0.1UI

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