LFE3-35EA-8FN672I Lattice, LFE3-35EA-8FN672I Datasheet - Page 91

• Manufacturer Part Number: LFE3-35EA-8FN672I
• Description: IC FPGA 33.3K LUTS 310I/O FN672
• Manufacturer: Lattice
• Series: ECP3r

Specifications of LFE3-35EA-8FN672I

• Number Of Logic Elements/cells: 33000
• Number Of Labs/clbs: 4125
• Total Ram Bits: 1358848
• Number Of I /o: 310
• Number Of Gates: -
• Voltage - Supply: 1.14 V ~ 1.26 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 672-BBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 220-1163

Lattice Semiconductor
Table 3-7. Channel Output Jitter
Deterministic
Random
Total
Deterministic
Random
Total
Deterministic
Random
Total
Deterministic
Random
Total
Deterministic
Random
Total
Deterministic
Random
Total
Note: Values are measured with PRBS 2
reference clock @ 10X mode.
Description
3.125 Gbps
3.125 Gbps
3.125 Gbps
2.5Gbps
2.5Gbps
2.5Gbps
1.25 Gbps
1.25 Gbps
1.25 Gbps
622 Mbps
622 Mbps
622 Mbps
250 Mbps
250 Mbps
250 Mbps
150 Mbps
150 Mbps
150 Mbps
Frequency
7
-1, all channels operating, FPGA logic active, I/Os around SERDES pins quiet,
Min.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
3-38
Typ.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
DC and Switching Characteristics
LatticeECP3 Family Data Sheet
Max.
0.17
0.35
0.20
0.22
0.10
0.10
0.10
0.25
0.17
0.35
0.10
0.24
0.20
0.24
0.18
0.24
0.18
0.24
UI, p-p
UI, p-p
UI, p-p
UI, p-p
UI, p-p
UI, p-p
UI, p-p
UI, p-p
UI, p-p
UI, p-p
UI, p-p
UI, p-p
UI, p-p
UI, p-p
UI, p-p
UI, p-p
UI, p-p
UI, p-p
Units