LFE3-35EA-8FN672I Lattice, LFE3-35EA-8FN672I Datasheet - Page 53

IC FPGA 33.3K LUTS 310I/O FN672

LFE3-35EA-8FN672I

Manufacturer Part Number
LFE3-35EA-8FN672I
Description
IC FPGA 33.3K LUTS 310I/O FN672
Manufacturer
Lattice
Series
ECP3r

Specifications of LFE3-35EA-8FN672I

Number Of Logic Elements/cells
33000
Number Of Labs/clbs
4125
Total Ram Bits
1358848
Number Of I /o
310
Number Of Gates
-
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
672-BBGA
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
220-1163
Architecture
Lattice Semiconductor
LatticeECP3 Family Data Sheet
Density Shifting
The LatticeECP3 family is designed to ensure that different density devices in the same family and in the same
package have the same pinout. Furthermore, the architecture ensures a high success rate when performing design
migration from lower density devices to higher density devices. In many cases, it is also possible to shift a lower uti-
lization design targeted for a high-density device to a lower density device. However, the exact details of the final
resource utilization will impact the likelihood of success in each case. An example is that some user I/Os may
become No Connects in smaller devices in the same package.
2-50

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