WG82577LM S LGWR Intel, WG82577LM S LGWR Datasheet - Page 130
WG82577LM S LGWR
Manufacturer Part Number
WG82577LM S LGWR
Description
Manufacturer
Intel
Datasheet
1.WG82577LM_S_LGWR.pdf
(195 pages)
Specifications of WG82577LM S LGWR
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FD reflects the actual MAC duplex configuration. This normally reflects the duplex
setting for the entire link, as it normally reflects the duplex configuration negotiated
between the PHY and link partner (copper link) or MAC and link partner (fiber link).
Link up provides a useful indication of whether something is attached to the port.
Successful negotiation of features/link parameters results in link activity. The link
startup process (and consequently the duration for this activity after reset) might be
several 100's of ms. It reflects whether the PHY's link indication is present.
TXOFF indicates the state of the transmit function when symmetrical flow control has
been enabled and negotiated with the link partner. This bit is set to 1b when
transmission is paused due to the reception of an XOFF frame. It is cleared upon
expiration of the pause timer or the receipt of an XON frame.
SPEED indicates the actual MAC speed configuration. These bits normally reflect the
speed of the actual link, negotiated by the PHY and link partner, and reflected internally
from the PHY to the MAC. These bits might represent the speed configuration of the
MAC only, if the MAC speed setting has been forced via software (CTRL.SPEED). Speed
indications are mapped as shown below:
• 00b = 10 Mb/s
• 01b = 100 Mb/s
• 10b = 1000 Mb/s
• 11b = 1000 Mb/s
82577 GbE PHY—Intel
®
5 Series Express Chipset MAC Programming Interface
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