WG82577LM S LGWR Intel, WG82577LM S LGWR Datasheet - Page 19
WG82577LM S LGWR
Manufacturer Part Number
WG82577LM S LGWR
Description
Manufacturer
Intel
Datasheet
1.WG82577LM_S_LGWR.pdf
(195 pages)
Specifications of WG82577LM S LGWR
Lead Free Status / Rohs Status
Supplier Unconfirmed
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Pin Interface—82577 GbE PHY
3.1.2
3.1.3
3.1.4
PCIe Interface Pins (8)
SMBus Interface Pins (2)
1. AUX power means the power rail is available in all power states including G3 to S5 transitions and Sx states
Miscellaneous Pins (3)
Pin Name
PE_RST_N
PETp
PETn
PERp
PERn
PE_CLKP
PE_CLKN
CLK_REQ_N
Pin Name
SMB_CLK
SMB_DATA
Pin Name
RSVD1_VCC3P3
RSVD2_VCC3P3
LAN_DISABLE_N
with Wake on LAN (WoL) enabled.
Pin #
Pin #
28
31
36
38
39
41
42
44
45
48
Pin #
Type
1
2
3
Type
O/d
O/d
A-out
A-in
A-in
O/d
I
Type
Op Mode
T/s
T/s
Op Mode Name and Function
I
BI-dir
BI-dir
Output
Output
Input
Input
Input
Op Mode Name and Function
Name and Function
SMBus clock. Pull this signal up to 3.3 Vdc (auxiliary supply
through a 2.2 K resistor (while in Sx mode).
SMBus data. Pull this signal up to 3.3 Vdc (auxiliary supply) through
a 2.2 K resistor (while in Sx mode).
PCIe reset.
PCIe Tx.
PCIe Rx.
PCIe clock.
Clock request. Connect to VCC3P3 through a 10 K pull-up
resistor.
Connect to VCC3P3 through a 5%, 3.01 K resistor.
Connect to VCC3P3 through a 5%, 3.01 K resistor.
Connect to the LAN_PHY_PWR_CTRL/GPIO12 pin in the
Intel
Note: When this pin is set to 0b, the 82577 is disabled.
®
5 Series Express Chipset.
1
)
12
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