M29W128GL70N6E Micron Technology Inc, M29W128GL70N6E Datasheet - Page 47

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M29W128GL70N6E

Manufacturer Part Number
M29W128GL70N6E
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of M29W128GL70N6E

Cell Type
NOR
Density
128Mb
Access Time (max)
70ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
24/23Bit
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8/16Bit
Number Of Words
16M/8M
Supply Current
10mA
Mounting
Surface Mount
Pin Count
56
Lead Free Status / Rohs Status
Compliant

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10. If an Entry Command Set command is issued, an Exit Protection Command Set command must be issued to return the device to read mode.
Ad address, Dat data, BAd any address in the block, RD read data, PWDn password byte 0 to 7, PWAn password address (n = 0 to 7), X don’t
care. All values in the table are in hexadecimal.
Grey cells represent read cycles. The other cells are Write cycles.
DQ15 to DQ8 are ‘don’t care’ during unlock and command cycles. A22 to A16 are ‘don’t care’ during unlock and command cycles unless an
address is required.
An Enter command sequence must be issued prior to any operation. It disables read and write operations from and to block 0. Read and write
operations from any other block are allowed.
DATA = lock register content.
Only one portion of password can be programmed or read by each Password Program command.
The password portion can be entered or read in any order as long as the entire 64-bit password is entered or read.
Protected and unprotected states correspond to 00 and 01, respectively.
The Clear all NVPBs command programs all NVPBs before erasure in order to prevent the over-erasure of previously cleared non volatile
modify protection bits.
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