TE28F800B3TA110 Intel, TE28F800B3TA110 Datasheet - Page 58
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TE28F800B3TA110
Manufacturer Part Number
TE28F800B3TA110
Description
Manufacturer
Intel
Datasheet
1.TE28F800B3TA110.pdf
(70 pages)
Specifications of TE28F800B3TA110
Cell Type
NOR
Density
8Mb
Access Time (max)
110ns
Interface Type
Parallel
Boot Type
Top
Address Bus
19b
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
16b
Number Of Words
512K
Supply Current
18mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
TE28F800B3TA110
Manufacturer:
INTEL
Quantity:
1 871
Part Number:
TE28F800B3TA110
Manufacturer:
INTEL
Quantity:
20 000
28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
11.4.1
11.5
11.5.1
58
Suspending and Resuming Program
The Program Suspend halts the in-progress program operation to read data from another location of
memory. Once the programming process starts, writing the Program Suspend command to the CUI
requests that the WSM suspend the program sequence (at predetermined points in the program
algorithm). The device continues to output Status Register data after the Program Suspend
command is written. Polling SR.7 and SR.2 will determine when the program operation has been
suspended (both will be set to “1”). t
A Read Array command can now be written to the CUI to read data from blocks other than that
which is suspended. The only other valid commands while program is suspended are Read Status
Register, Read Identifier, and Program Resume. After the Program Resume command is written to
the flash memory, the WSM will continue with the program process and Status Register bits SR.2
and SR.7 will automatically be cleared. After the Program Resume command is written, the device
automatically outputs Status Register data when read. See
Flowcharts.”
mode. RP# must also remain at V
Erase Mode
To erase a block, write the Erase Set-up and Erase Confirm commands to the CUI, along with an
address identifying the block to be erased. This address is latched internally when the Erase
Confirm command is issued. Block erasure results in all bits within the block being set to “1.” Only
one block can be erased at a time. The WSM will execute a sequence of internally timed events to
program all bits within the block to “0,” erase all bits within the block to “1,” then verify that all
bits within the block are sufficiently erased. While the erase executes, status bit 7 is a “0.”
When the Status Register indicates that erasure is complete, check the erase-status bit to verify that
the Erase operation was successful. If the Erase operation was unsuccessful, SR.5 of the Status
Register will be set to a “1,” indicating an erase failure. If V
after the Erase Confirm command was issued, the WSM will not execute the erase sequence;
instead, SR.5 is set to indicate an Erase error, and SR.3 is set to a “1” to identify that V
voltage was not within acceptable limits.
After an Erase operation, clear the Status Register (50H) before attempting the next operation. Any
CUI instruction can follow after erasure is completed; however, to prevent inadvertent status-
register reads, it is advisable to place the flash in read-array mode after the erase is complete.
Suspending and Resuming Erase
Since an Erase operation requires on the order of seconds to complete, an Erase Suspend command
is provided to allow erase-sequence interruption in order to read data from—or program data to—
another block in memory. Once the erase sequence is started, writing the Erase Suspend command
to the CUI requests that the WSM pause the erase sequence at a predetermined point in the erase
algorithm. The Status Register will indicate if/when the Erase operation has been suspended.
A Read Array/Program command can now be written to the CUI in order to read data from/
program data to blocks other than the one currently suspended. The Program command can
subsequently be suspended to read yet another array location. The only valid commands while
Erase is suspended are Erase Resume, Program, Read Array, Read Status Register, or Read
Identifier. During erase-suspend mode, the chip can be placed in a pseudo-standby mode by taking
CE# to V
IH
, which reduces active current consumption.
V
PP
must remain at the same V
IH.
WHRH1
/t
PP
EHRH1
level used for program while in program- suspend
specify the program- suspend latency.
Appendix B, “Program and Erase
PP
was not within acceptable limits
Datasheet
PP
supply