TE28F800B3TA110 Intel, TE28F800B3TA110 Datasheet - Page 60

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TE28F800B3TA110

Manufacturer Part Number
TE28F800B3TA110
Description
Manufacturer
Intel
Datasheet

Specifications of TE28F800B3TA110

Cell Type
NOR
Density
8Mb
Access Time (max)
110ns
Interface Type
Parallel
Boot Type
Top
Address Bus
19b
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
16b
Number Of Words
512K
Supply Current
18mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Not Compliant

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Price
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28F008/800B3, 28F016/160B3, 28F320B3, 28F640B3
12.0
12.1
60
SR.7 = WRITE STATE MACHINE STATUS (WSMS)
SR.6 = ERASE-SUSPEND STATUS (ESS)
SR.5 = ERASE STATUS (ES)
SR.4 = PROGRAM STATUS (PS)
SR.3 = V
SR.2 = PROGRAM SUSPEND STATUS (PSS)
SR.1 = BLOCK LOCK STATUS
SR.0 = RESERVED FOR FUTURE ENHANCEMENTS (R)
NOTE: A Command Sequence Error is indicated when SR.4, SR.5, and SR.7 are set.
WSMS
1 = Ready
0 = Busy
1 = Erase Suspended
0 = Erase In Progress/Completed
1 = Error In Block Erasure
0 = Successful Block Erase
1 = Error in Word Program
0 = Successful Word Program
1 = V
0 = V
1 = Program Suspended
0 = Program in Progress/Completed
1 = Program/Erase attempted on locked block;
0 = No operation to locked blocks
Table 29. Status Register Bit Definition
7
Operation aborted
PP
PP
PP
OK
Low Detect, Operation Abort
STATUS (VPPS)
Block Locking
The B3 flash memory device architecture features two hardware-lockable parameter blocks.
WP# = V
The lockable blocks are locked when WP# = V
block will result in an error, which will be reflected in the Status Register:
ESS
For top configuration, the top two parameter blocks (blocks #133 and #134 for the 64 Mbit,
#69 and #70 for the 32 Mbit, blocks #37 and #38 for the 16 Mbit, blocks #21 and #22 for the 8
Mbit, blocks #13 and #14 for the 4 Mbit) are lockable.
6
IL
for Block Locking
ES
5
PS
4
Check Write State Machine bit first to determine word program
or block-erase completion, before checking program or erase-
status bits.
When erase suspend is issued, WSM halts execution and sets
both WSMS and ESS bits to “1.” ESS bit remains set at “1” until
an Erase Resume command is issued.
When this bit is set to “1,” WSM has applied the max. number
of erase pulses to the block and is still unable to verify
successful block erasure.
When this bit is set to “1,” WSM has attempted but failed to
program a word.
The V
V
Program or Erase command sequences have been entered,
and informs the system if V
V
WSM. The V
feedback between V
max and V
When program suspend is issued, WSM halts execution and
sets both WSMS and PSS bits to “1.” PSS bit remains set to “1”
until a Program Resume command is issued.
If a Program or Erase operation is attempted to one of the
locked blocks, this bit is set by the WSM. The operation
specified is aborted and the device is returned to read status
mode.
This bit is reserved for future use and must be masked out
when polling the Status Register.
PP
PP
VPPS
level. The WSM interrogates V
is also checked before the operation is verified by the
IL
PP
3
; any program or Erase operation to a locked
status bit does not provide continuous indication of
PP4
PP
min.
status bit is not guaranteed to report accurate
PPLK
PSS
2
max and V
NOTES:
PP
has not been switched on. The
PP
PP1
BLS
level only after the
1
min or between V
Datasheet
R
0
PP1

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