MT48LC8M16A2P-6A Micron Technology Inc, MT48LC8M16A2P-6A Datasheet - Page 65
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MT48LC8M16A2P-6A
Manufacturer Part Number
MT48LC8M16A2P-6A
Description
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet
1.MT48LC8M16A2P-6A.pdf
(74 pages)
Specifications of MT48LC8M16A2P-6A
Organization
8Mx16
Density
128Mb
Address Bus
14b
Access Time (max)
5.4ns
Maximum Clock Rate
167MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
165mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MT48LC8M16A2P-6A
Manufacturer:
MT
Quantity:
162
Part Number:
MT48LC8M16A2P-6A
Manufacturer:
MICRON/美光
Quantity:
20 000
Part Number:
MT48LC8M16A2P-6A AIT:L
Manufacturer:
MICRON/美光
Quantity:
20 000
Company:
Part Number:
MT48LC8M16A2P-6A IT:L
Manufacturer:
MICRON
Quantity:
250
Company:
Part Number:
MT48LC8M16A2P-6A:L
Manufacturer:
MICRON
Quantity:
7 660
Part Number:
MT48LC8M16A2P-6A:L
Manufacturer:
MICRON/美光
Quantity:
20 000
Part Number:
MT48LC8M16A2P-6AG
Manufacturer:
MICRON/美光
Quantity:
20 000
Company:
Part Number:
MT48LC8M16A2P-6AIT
Manufacturer:
NXP
Quantity:
23 000
Part Number:
MT48LC8M16A2P-6AIT:L
Manufacturer:
MICRON/美光
Quantity:
20 000
Figure 49:
PDF: 09005aef8091e66d/Source: 09005aef8091e625
128MSDRAM_2.fm - Rev. N 1/09 EN
DQML, DQMH
COMMAND
A0–A9, A11
BA0, BA1
DQM /
CKE
CLK
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
ACTIVE
T0
ROW
ROW
BANK
WRITE – Without Auto Precharge
t CKH
t CMH
t AH
t AH
t AH
Notes:
t RCD
t RAS
t RC
t CK
T1
NOP
1. For this example, BL = 4, and the WRITE burst is followed by a “manual” PRECHARGE.
2. 15ns is required between <D
3. x16: A9 and A11 = “Don’t Care.”
DISABLE AUTO PRECHARGE
quency.
x8: A11 = “Don’t Care.”
t CMS
t CL
t DS
COLUMN m 3
WRITE
BANK
T2
D
IN
t CMH
t CH
t DH
m
t DS
D
T3
IN
NOP
m + 1
t DH
t DS
D
IN
T4
NOP
m + 2
t DH
65
IN
m + 3> and the PRECHARGE command, regardless of fre-
t DS
D
IN
T5
NOP
m + 3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t DH
t WR
NOP
T6
2
128Mb: x4, x8, x16 SDRAM
SINGLE BANK
PRECHARGE
ALL BANKS
BANK
T7
©1999 Micron Technology, Inc. All rights reserved.
Timing Diagrams
t RP
NOP
T8
ACTIVE
ROW
ROW
BANK
T9
DON’T CARE