ST52T440F3M6 STMicroelectronics, ST52T440F3M6 Datasheet - Page 23
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ST52T440F3M6
Manufacturer Part Number
ST52T440F3M6
Description
MCU 8-Bit ST52 CISC 8KB EPROM 5V 20-Pin SO
Manufacturer
STMicroelectronics
Datasheet
1.ST52T440F3M6.pdf
(94 pages)
Specifications of ST52T440F3M6
Package
20SO
Family Name
ST52
Maximum Speed
20 MHz
Ram Size
256 Byte
Program Memory Size
8 KB
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Program Memory Type
EPROM
Number Of Programmable I/os
13
On-chip Adc
6-chx12-bit
Operating Temperature
-40 to 85 °C
Number Of Timers
1
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2.2.3 Configuration Registers.
The ST52x400/440/441 Configuration Registers
allow the configuration of all the blocks of the ICU.
Table 2.2 describes the functions and the related
peripherals of the 21 Configuration Registers
available: in order to simplify the concept a mne-
monic name is assigned to each Configuration
Register. The same name is used in VISUAL
FIVE
instructions the Configuration Registers may be
set by using values stored in the Program Memory
(EPROM) or in the RAM.
The assembler instruction LDCE conf,mem loads
the Configuration Register conf with the contents
of memory location mem , inside the currently set
memory page.
The assembler instructions LDCR conf,reg loads
the Configuration Register conf with the contents
of the register (RAM location) reg .
Use and meaning of each register will be
described in further details in the corresponding
section.
Table 2.1 Input Registers
(**) Not used on ST52x400F/440F441F versions
(*) Not used on ST52x400xx versions
TM
IR MNEMONIC NAME
AC_CHAN4H (*)(**)
AC_CHAN5H (*)(**)
AC_CHAN4L (*)(**)
AC_CHAN5L (*)(**)
STACK_POINTER
AC_CHAN0H(*)
AC_CHAN1H(*)
AC_CHAN2H(*)
AC_CHAN3H(*)
TRIAC_COUNT
AC_CHAN0L(*)
AC_CHAN1L(*)
AC_CHAN2L(*)
AC_CHAN3L(*)
AC_STATUS(*)
PWM_STATUS
PWM_COUNT
development tools. By using the load
PORT_C (**)
PORT_A
PORT_B
Analog Comparator CHANNEL 0 High Byte
Analog Comparator CHANNEL 1 High Byte
Analog Comparator CHANNEL 2 High Byte
Analog Comparator CHANNEL 3 High Byte
Analog Comparator CHANNEL 4 High Byte
Analog Comparator CHANNEL 5 High Byte
Analog Comparator CHANNEL 0 Low Byte
Analog Comparator CHANNEL 1 Low Byte
Analog Comparator CHANNEL 2 Low Byte
Analog Comparator CHANNEL 3 Low Byte
Analog Comparator CHANNEL 4 Low Byte
Analog Comparator CHANNEL 5 Low Byte
Analog Comparator Status Register
TRIAC DRIVER COUNTER Value
PWM/TIMER COUNTER Value
TIMER STATUS REGISTER
PORT A INPUT REGISTER
PORT B INPUT REGISTER
PORT C INPUT REGISTER
PERIPHERAL REGISTER
STACK POINTER
2.2.4 Output Registers.
The Output Registers (OR) consist of 6 registers
containing data for the ICU peripherals including I/
O Ports.
All registers can be specified by using a decimal
address, e.g. 1 identifies the second OR.
By using the LOAD type instructions the Output
Registers (OR) may be set with values stored in
the Program Memory (LDPE) or in the RAM
(LDPR).
The assembler instruction LDPE out,mem loads
the Output Register out with the contents of mem-
ory location mem , inside the currently set memory
page. The assembler instruction LDPR out,reg
loads the Output Register out with the contents of
register (RAM location) reg .
Table 2.3 describes the OR: in order to simplify the
concept a mnemonic name is assigned to each of
the Output Registers. The same name is used in
VISUAL FIVE
meaning of each register will be described in fur-
ther details in the corresponding section.
TM
ST52T400/T440/E440/T441
development tools. Use and
ADDRESS
10
12
13
14
15
16
17
18
19
11
0
1
2
3
4
5
6
7
8
9
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