ST52T440F3M6 STMicroelectronics, ST52T440F3M6 Datasheet - Page 40

• Manufacturer Part Number: ST52T440F3M6
• Description: MCU 8-Bit ST52 CISC 8KB EPROM 5V 20-Pin SO
• Manufacturer: STMicroelectronics

Specifications of ST52T440F3M6

• Package: 20SO
• Family Name: ST52
• Maximum Speed: 20 MHz
• Ram Size: 256 Byte
• Program Memory Size: 8 KB
• Operating Supply Voltage: 5 V
• Data Bus Width: 8 Bit
• Program Memory Type: EPROM
• Number Of Programmable I/os: 13
• On-chip Adc: 6-chx12-bit
• Operating Temperature: -40 to 85 °C
• Number Of Timers: 1

ST52T400/T440/E440/T441
Figure 4.5 Interrupt Configuration Registers 17 and 18
4.5 Interrupt Priority
Seven priority levels are available: level 6 has the
lowest priority, level 0 has the highest priority.
Level 6 is associated to the Main Program, levels
5 to 1 are programmable by means of the priority
registers
REG_CONF18; whereas the higher level is
related to the External Interrupt (INT_EXT).
PWM/Timer, TRIAC/PWM and Analog Block are
identified by a three-bit Peripheral Code (see
Table 4.2); in order to set the i -th priority level the
user must write the peripheral label i in the related
INT i priority level.
For instance:
LDRC 10,193
in the RAM Register 10)
LDRC 11,168 (loads the value 168=’10101000’
in the RAM Register 11)
LDCR 17,10 (REG_CONF17= ‘11000001’)
LDCR 18,11 (REG_CONF18= ‘10101000’)
thus defining the following priority levels:
40/94
Level 1: INT_PWM/TIMER (PWM/TIMER Code:
001)
Level 2: INT_ADC (ADC Code: 000)
Level 3: INT_TRIAC/PWM_R (TRIAC/PWM
Code: 011)
Level 4: INT_TRIAC/Ph (TRIAC/Ph Code: 100)
D15
D14
called
D13
(loads the value 193=’11000001’
REG_CONF18
D12
D11
REG_CONF17
D10
D9
Interrupts Priority
D8
and
D7
D6
Table 4.3 Conf. Registers 17-18 Description
REMARK: The Interrupt priority must be set at the
beginning of the main program, because at the
RESET REG_CONF1=’00000000’, this condition
could
changing the priority levels must be avoided in
interrupt service routines.
When a source provides an Interrupt request, and
the request processing is also enabled, the CU
changes the normal sequential flow of a program
by transferring program control to a selected ser-
vice routine.
When an interrupt occurs the CU executes a
JUMP instruction to the address loaded in the
related location of the Interrupt Vector and the
flags are saved.
When the execution returns to the original pro-
9, 10, 11
Level 5: INT_TRIAC/PWM_F (TRIAC/PWM_F
Code: 010)
12, 13,
0, 1, 2
3, 4, 5
6, 7, 8
D5
Bit
generate
REG_CONF17
D4
Name
INT1
INT2
INT4
INT5
INT6
D3
wrong
D2
Peripheral
Peripheral
Peripheral
Peripheral
Peripheral
Value
D1
operations.
D0
MediumHigh
MediumLow
INT 1
INT 2
INT 3
INT 4
INT 5
Not Used
Very Low
Level
High
Low
Further,