ST52T440F3M6 STMicroelectronics, ST52T440F3M6 Datasheet - Page 79

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ST52T440F3M6

Manufacturer Part Number
ST52T440F3M6
Description
MCU 8-Bit ST52 CISC 8KB EPROM 5V 20-Pin SO
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST52T440F3M6

Package
20SO
Family Name
ST52
Maximum Speed
20 MHz
Ram Size
256 Byte
Program Memory Size
8 KB
Operating Supply Voltage
5 V
Data Bus Width
8 Bit
Program Memory Type
EPROM
Number Of Programmable I/os
13
On-chip Adc
6-chx12-bit
Operating Temperature
-40 to 85 °C
Number Of Timers
1

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11.8 ESD Pin Protection Strategy
In order to protect an integrated circuit against
Electro-Static Discharge the stress must be
controlled to prevent degradation or destruction of
the circuit elements. Stress generally affects the
circuit elements, which are connected to the pads
but can also affect the internal devices when the
supply pads receive the stress. The elements that
are to be protected must not receive excessive
current, voltage, or heating within their structure.
An ESD network combines the different input and
output protections. This network works by allowing
safe discharge paths for the pins subject to ESD
stress. Two critical ESD stress cases are
Figure 11.8 Safe discharge path subjected to ESD stress
Figure 11.9 Negative Stress on a Standard Pad vs. VDD
M ain path
P ath to avoid
Main path
VD D
VS S
VDD
VSS
(3a)
(3b)
(3 a)
(3 b)
OUT
O U T
(4)
presented in Figure 11.8 and Figure 11.9 for
standard pins.
11.8.1 Standard Pin Protection
In order to protect the output structure the following
elements are added:
- A diode to V
- A protection device between V
In order protect the input structure the following
elements are added:
- A resistor in series with pad (1)
- A diode to V
- A protection device between V
IN
(4 )
IN
DD
DD
(2a)
(1)
(2b)
(3a) and a diode from V
(2a) and a diode from V
ST52T400/T440/E440/T441
(2 a)
(1 )
(2 b)
VDD
VSS
DD
DD
and V
and V
V D D
V SS
SS
SS
SS
SS
(3b)
(2b)
(4)
(4)
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