DS21552L+ Maxim Integrated Products, DS21552L+ Datasheet - Page 10

• Manufacturer Part Number: DS21552L+
• Description: IC TXRX T1 1-CHIP 5V 100-LQFP
• Manufacturer: Maxim Integrated Products

Specifications of DS21552L+

• Function: Single-Chip Transceiver
• Interface: E1, HDLC, J1, T1
• Number Of Circuits: 1
• Voltage - Supply: 4.75 V ~ 5.25 V
• Current - Supply: 75mA
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 100-LQFP
• Includes: DSX-1 and CSU Line Build-Out Generator, HDLC Controller, In-Band Loop Code Generator and Detector
• Product: Framer
• Number Of Transceivers: 1
• Data Rate: 64 Kbps
• Supply Voltage (max): 3.465 V
• Supply Voltage (min): 3.135 V
• Supply Current (max): 75 mA (Typ)
• Maximum Operating Temperature: + 70 C
• Minimum Operating Temperature: 0 C
• Mounting Style: SMD/SMT
• Ic Interface Type: Parallel, Serial
• Supply Voltage Range: 4.75V To 5.25V
• Operating Temperature Range: 0°C To +70°C
• Digital Ic Case Style: LQFP
• No. Of Pins: 100
• Filter Terminals: SMD
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power (watts): -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

3.2 DOCUMENT REVISION HISTORY
Revision
12-10-98
12-18-98
1-18-99
1-18-99
1-28-99
2-11-99
4-15-99
5-17-99
5-19-99
7-27-99
8-16-99
1-4-99
2-2-99
4-1-99
5-7-99
Initial Release
Add LIUODO (LIU Open Drain Output) to CCR7.0
Add CDIG (Customer Disconnect Indication Generator) to CCR7.1
Add LIUSI (Line Interface Unit Synchronization Interface) to CCR7.2
Correct IBO register bit functions order
Add bit level description to CCR3.6
Delete “The elastic stores can be forced to a known depth via the Elastic Store Reset bit (CCR3.6).
Toggling the CCR3.6 bit forces the read and write pointers into opposite frames” from section 12.0
Add receive IBO operation PCM timing diagram
Correct Device ID register bit definitions
Correct TSYSCLK and RSYSCLK AC timing and add 4.096 MHz and 8.192 MHz AC timing
Correct definition and label or TUDR bit in TPRM register
Correct format of register definitions in body of data sheet
Add Receive Monitor Mode section
Add section on Protected Interfaces
Correct FMS pin # and description in JTAG section
Correct name of status registers in section 15.3.2
Correct definition of RIR3.4
Correct Receive Monitor Mode section
Remove “Preliminary” notice from data sheet
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Notes