PSB 21150 F V1.4 Infineon Technologies, PSB 21150 F V1.4 Datasheet - Page 27
PSB 21150 F V1.4
Manufacturer Part Number
PSB 21150 F V1.4
Description
IC MODULAR ISDN NT INTELL TQFP64
Manufacturer
Infineon Technologies
Datasheet
1.PSB_21150_F_V1.4.pdf
(270 pages)
Specifications of PSB 21150 F V1.4
Function
PC Adapter Circuit
Interface
HDLC, ISDN, SCI
Number Of Circuits
1
Voltage - Supply
3.3V
Current - Supply
30mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
64-LFQFP
Includes
Activation and Deactivation, D-Channel Access Control, Monitor Channel Handler
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power (watts)
-
Other names
PSB21150FV1.4XT
PSB21150FV14NP
PSB21150FV14XP
SP000007575
SP000007577
PSB21150FV14NP
PSB21150FV14XP
SP000007575
SP000007577
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Table 2
Pin No.
MQFP-64
TQFP-64
41
3
1
5
38
IOM-2 Interface
52
53
Data Sheet
Symbol Input (I)
ALE
CS
INT
RES
AMODE I
FSC
DCL
IPAC-X Pin Definitions and Functions (cont’d)
Output (O)
Open Drain
(OD)
I
I
OD (O)
I
I/O
I/O
Function
Address Latch Enable
A HIGH on this line indicates an address on the
external address/data bus (multiplexed bus type
only).
ALE also selects the microcontroller interface bus
type (multiplexed or non multiplexed).
Chip Select
A low level indicates a microcontroller access to the
IPAC-X.
Interrupt Request
INT becomes active low (open drain) if the IPAC-X
requests an interrupt.
The polarity can be reprogrammed to high active
with push-pull chracteristic.
Reset
A LOW on this input forces the IPAC-X into a reset
state.
Address Mode
Selects between direct (0) and indirect (1) register
access mode.
Frame Sync
8-kHz frame synchronization signal.
Data Clock
IOM-2 interface clock signal (double clock) (e.g
1.536 MHz in TE mode).
27
Pin Configuration
PSB/PSF 21150
2003-01-30
IPAC-X
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