SC16C654IA68,529 NXP Semiconductors, SC16C654IA68,529 Datasheet
SC16C654IA68,529
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935270051529
SC16C654IA68-S
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SC16C654IA68,529 Summary of contents
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SC16C654/654D Quad UART with 64-byte FIFO and infrared (IrDA) encoder/decoder Rev. 04 — 19 June 2003 1. Description The SC16C654/654D is a 4-channel Universal Asynchronous Receiver and Transmitter (QUART) used for serial data communications. Its principal function is to convert ...
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Philips Semiconductors Fully programmable character formatting: False start-bit detection Complete status reporting capabilities 3-State output TTL drive capabilities for bi-directional data bus and control bus Line Break generation and detection Internal diagnostic capabilities: Prioritized interrupt system controls Modem control functions ...
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Philips Semiconductors 4. Block diagram SC16C654/654D D0–D7 DATA BUS IOR AND IOW CONTROL LOGIC RESET A0–A2 REGISTER CSA-CSD SELECT LOGIC 16/68 INTA-INTD TXRDY RXRDY INTERRUPT CONTROL LOGIC INTSEL Fig 1. SC16C654/654D block diagram (16 mode). 9397 750 11617 Product data ...
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Philips Semiconductors SC16C654/654D D0–D7 DATA BUS R/W AND RESET CONTROL LOGIC A0–A4 REGISTER CS SELECT LOGIC 16/68 IRQ INTERRUPT TXRDY CONTROL RXRDY LOGIC Fig 2. SC16C654/654D block diagram (68 mode). 9397 750 11617 Product data Quad UART with 64-byte FIFO ...
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Philips Semiconductors 5. Pinning information 5.1 Pinning 5.1.1 PLCC68 DSRA 10 CTSA 11 DTRA RTSA 14 INTA 15 CSA 16 TXA 17 IOW 18 TXB 19 CSB 20 INTB 21 RTSB 22 GND 23 DTRB 24 ...
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Philips Semiconductors DSRA 10 CTSA 11 DTRA RTSA 14 IRQ TXA 17 R/W 18 TXB RTSB 22 GND 23 DTRB 24 CTSB 25 DSRB 26 Fig 4. PLCC68 ...
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Philips Semiconductors 5.1.2 LQFP64 DSRA 1 CTSA 2 DTRA RTSA 5 INTA 6 CSA 7 TXA 8 IOW 9 TXB 10 CSB 11 INTB 12 RTSB 13 GND 14 DTRB 15 CTSB 16 Fig 5. LQFP64 ...
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Philips Semiconductors Table 2: Pin description …continued Pin Symbol PLCC68 LQFP64 A3 CDA, CDB, 9, 27, 64, 18, CDC, CDD 43, 61 31, 49 CLKSEL CSA, CSB, 16, 20, 7, 11, ...
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Philips Semiconductors Table 2: Pin description …continued Pin Symbol PLCC68 LQFP64 INTA, INTB, 15, 21, 6, 12, INTC, INTD 49, 55 37, 43 INTSEL 65 - IOR 52 40 IOW 18 9 IRQ 21, 49, - 52, ...
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Philips Semiconductors Table 2: Pin description …continued Pin Symbol PLCC68 LQFP64 RTSA, RTSB, 14, 22, 5, 13, RTSC, RTSD 48, 56 36 RXA, RXB, 7, 29, 62, 20, RXC, RXD 41, 63 29, 51 RXRDY 38 ...
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Philips Semiconductors 6. Functional description The SC16C654/654D provides serial asynchronous receive data synchronization, parallel-to-serial and serial-to-parallel data conversions for both the transmitter and receiver sections. These functions are necessary for converting the serial data stream into parallel data that is ...
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Philips Semiconductors character. In the 16 mode, INTSEL and MCR[3] can be configured to provide a software controlled or continuous interrupt capability. Due to pin limitations of the 64-pin package, this feature is offered by two different LQFP64 packages. The ...
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Philips Semiconductors 6.4 Internal registers The SC16C654/654D provides 15 internal registers for monitoring and control. These registers are shown in in the standard 16C554. These registers function as data holding registers (THR/RHR), interrupt status and control registers (IER/ISR), a FIFO ...
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Philips Semiconductors interrupt is generated whenever the Receive Holding Register (RHR) has not been read following the loading of a character or the receive trigger level has not been reached. (For a description of this timing, see Table 6: Selected ...
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Philips Semiconductors suspend/resume transmissions. When double 8-bit Xon/Xoff characters are selected, the SC16C654/654D compares two consecutive receive characters with two software flow control 8-bit values (Xon1, Xon2, Xoff1, Xoff2) and controls TX transmissions accordingly. Under the above described flow control ...
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Philips Semiconductors When two interrupt conditions have the same priority important to service these interrupts correctly. Receive Data Ready and Receive Time Out have the same interrupt priority (when enabled by IER[0]). The receiver issues an interrupt after ...
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Philips Semiconductors same system design. After a hardware reset and during initialization, the SC16C654/654D sets the default baud rate table according to the state of the CLKSEL pin. A logic 1 on CLKSEL will set the 1 clock default, whereas ...
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Philips Semiconductors 6.12 DMA operation The SC16C654/654D FIFO trigger level provides additional flexibility to the user for block mode operation. LSR[5,6] provide an indication when the transmitter is empty or has an empty location(s). The user can optionally operate the ...
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Philips Semiconductors SC16C654/654D D0–D7 DATA BUS IOR AND IOW CONTROL LOGIC RESET A0–A2 REGISTER CSA-CSD SELECT LOGIC INTA-INTD INTERRUPT TXRDY CONTROL RXRDY LOGIC Fig 8. Internal loop-back mode diagram. 9397 750 11617 Product data Quad UART with 64-byte FIFO and ...
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Philips Semiconductors 7. Register descriptions Table 8 The assigned bit functions are more fully defined in Table 8: SC16C654/654D internal registers Shaded bits are only accessible when EFR[4] is set. [ Register Default [2] General Register Set ...
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Philips Semiconductors 7.1 Transmit (THR) and Receive (RHR) Holding Registers The serial transmitter section consists of an 8-bit Transmit Hold Register (THR) and Transmit Shift Register (TSR). The status of the THR is provided in the Line Status Register (LSR). ...
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Philips Semiconductors Table 9: Bit 7.2.1 IER versus Receive FIFO interrupt mode operation When the receive FIFO (FCR[0] = logic 1), and receive interrupts (IER[0] = logic 1) are enabled, the receive interrupts and register status will ...
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Philips Semiconductors 7.3 FIFO Control Register (FCR) This register is used to enable the FIFOs, clear the FIFOs, set the transmit/receive FIFO trigger levels, and select the DMA mode. 7.3.1 DMA mode Mode 0 (FCR bit 3 = 0): receive ...
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Philips Semiconductors Table 10: Bit Table 11: FCR[ Table 12: FCR[ 9397 750 11617 Product data Quad UART with 64-byte FIFO and infrared (IrDA) encoder/decoder FIFO Control Register bits ...
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Philips Semiconductors 7.4 Interrupt Status Register (ISR) The SC16C654/654D provides six levels of prioritized interrupts to minimize external software interaction. The Interrupt Status Register (ISR) provides the user with six interrupt status bits. Performing a read cycle on the ISR ...
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Philips Semiconductors 7.5 Line Control Register (LCR) The Line Control Register is used to specify the asynchronous data communication format. The word length, the number of stop bits, and the parity are selected by writing the appropriate bits in this ...
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Philips Semiconductors Table 16: LCR[ Table 17: LCR[ Table 18: LCR[ 7.6 Modem Control Register (MCR) This register controls the interface with the modem or a peripheral device. ...
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Philips Semiconductors Table 19: Bit 9397 750 11617 Product data Quad UART with 64-byte FIFO and infrared (IrDA) encoder/decoder Modem Control Register bits description Symbol Description MCR[5] Xon Any. Logic 0 = Disable Xon ...
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Philips Semiconductors 7.7 Line Status Register (LSR) This register provides the status of data transfers between the SC16C654/654D and the CPU. Table 20: Bit 9397 750 11617 Product data Quad UART with 64-byte ...
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Philips Semiconductors Table 20: Bit 0 7.8 Modem Status Register (MSR) This register provides the current state of the control interface signals from the modem, or other peripheral device to which the SC16C654/654D is connected. Four bits of this register ...
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Philips Semiconductors Table 21: Bit 1 0 [1] Whenever any MSR bit 0-3 is set to logic 1, a Modem Status Interrupt will be generated. 7.9 Scratchpad Register (SPR) The SC16C654/654D provides a temporary data register to store 8 bits ...
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Philips Semiconductors Table 22: Bit 5 4 3-0 Table 23: Cont [1] When using software flow control the Xon/Xoff characters cannot be used for data transfer. 9397 750 11617 Product ...
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Philips Semiconductors 7.11 SC16C654/654D external reset conditions Table 24: Register IER ISR LCR MCR LSR MSR FCR EFR Table 25: Output TXA, TXB, TXC, TXD RTSA, RTSB, RTSC, RTSD DTRA, DTRB, DTRC, DTRD RXRDY TXRDY 8. Limiting values Table 26: ...
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Table 27: DC electrical characteristics + 2 5.0 V 10%, unless otherwise specified. amb CC Symbol ...
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Philips Semiconductors 10. Dynamic characteristics Table 28: AC electrical characteristics + 2 5.0 V 10%, unless otherwise specified. amb CC Symbol Parameter clock pulse duration ...
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Philips Semiconductors Table 28: AC electrical characteristics + 2 5.0 V 10%, unless otherwise specified. amb CC Symbol Parameter t write cycle delay 32d t data set-up time ...
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Philips Semiconductors A0–A4 t 30s CS t 32s R/W D0–D7 Fig 10. General write timing in 68 mode. A0–A2 ADDRESS 13d IOW D0–D7 Fig 11. General write timing in 16 mode. 9397 750 11617 Product data ...
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Philips Semiconductors A0–A2 ADDRESS IOR D0–D7 Fig 12. General read timing in 16 mode. 9397 750 11617 Product data Quad UART with 64-byte FIFO and infrared (IrDA) encoder/decoder t 6h VALID t 7h ACTIVE t ...
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Philips Semiconductors IOW ACTIVE RTS CHANGE OF STATE DTR CD CTS DSR INT IOR RI Fig 13. Modem input/output timing EXTERNAL CLOCK Fig 14. External clock timing. 9397 750 11617 Product data Quad UART with 64-byte FIFO and ...
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Philips Semiconductors START BIT RX INT IOR Fig 15. Receive timing. 9397 750 11617 Product data Quad UART with 64-byte FIFO and infrared (IrDA) encoder/decoder DATA BITS (5- DATA BITS 6 DATA BITS ...
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Philips Semiconductors START BIT RX RXRDY IOR Fig 16. Receive ready timing in non-FIFO mode. START BIT RX RXRDY IOR Fig 17. Receive ready timing in FIFO mode. 9397 750 11617 Product data Quad UART with 64-byte FIFO and infrared ...
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Philips Semiconductors START BIT TX INT t 23d ACTIVE IOW Fig 18. Transmit timing. 9397 750 11617 Product data Quad UART with 64-byte FIFO and infrared (IrDA) encoder/decoder DATA BITS (5– DATA BITS ...
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Philips Semiconductors Fig 19. Transmit ready timing in non-FIFO mode. 9397 750 11617 Product data Quad UART with 64-byte FIFO and infrared (IrDA) encoder/decoder Rev. 04 — 19 June 2003 SC16C654/654D © Koninklijke Philips Electronics N.V. 2003. All rights reserved. ...
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Philips Semiconductors START BIT TX ACTIVE IOW D0–D7 BYTE #16 t 27d TXRDY Fig 20. Transmit ready timing in FIFO mode (DMA mode ‘1’). 9397 750 11617 Product data Quad UART with 64-byte FIFO and infrared (IrDA) encoder/decoder DATA BITS ...
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Philips Semiconductors IRTXA–IRTXD Fig 21. Infrared transmit timing. IRRXA–IRRXD Fig 22. Infrared receive timing. 9397 750 11617 Product data Quad UART with 64-byte FIFO and infrared (IrDA) encoder/decoder UART FRAME DATA TX BIT TIME RX ...
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Philips Semiconductors 11. Package outline PLCC68: plastic leaded chip carrier; 68 leads pin 1 index DIMENSIONS (mm dimensions are derived from the original inch dimensions) A ...
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Philips Semiconductors LQFP64: plastic low profile quad flat package; 64 leads; body 1 pin 1 index DIMENSIONS (mm are the original dimensions) A ...
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Philips Semiconductors 12. Soldering 12.1 Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages ...
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Philips Semiconductors • For packages with leads on two sides and a pitch (e): – larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be – smaller than 1.27 mm, the footprint longitudinal axis must ...
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Philips Semiconductors [3] These transparent plastic packages are extremely sensitive to reflow soldering conditions and must on no account be processed through more than one soldering cycle or subjected to infrared reflow soldering with peak temperature exceeding 217 C oven. ...
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Philips Semiconductors 14. Data sheet status [1] Level Data sheet status Product status I Objective data Development II Preliminary data Qualification III Product data Production [1] Please consult the most recently issued data sheet before initiating or completing a design. ...
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Philips Semiconductors Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . ...