AT90USB162 Atmel Corporation, AT90USB162 Datasheet - Page 175

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AT90USB162

Manufacturer Part Number
AT90USB162
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT90USB162

Flash (kbytes)
16 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
22
Ext Interrupts
21
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
5
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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18.3
Table 18-2.
18.4
7707F–AVR–11/10
UCPOLn
SPI Data Modes and Timing
Frame Formats
0
0
1
1
UCPOLn and UCPHAn Functionality-
UCPHAn
There are four combinations of XCKn (SCK) phase and polarity with respect to serial data, which
are determined by control bits UCPHAn and UCPOLn. The data transfer timing diagrams are
shown in
signal, ensuring sufficient time for data signals to stabilize. The UCPOLn and UCPHAn function-
ality is summarized in
all ongoing communication for both the Receiver and Transmitter.
Figure 18-1. UCPHAn and UCPOLn data transfer timing diagrams.
A serial frame for the MSPIM is defined to be one character of 8 data bits. The USART in MSPIM
mode has two valid frame formats:
A frame starts with the least or most significant data bit. Then the next data bits, up to a total of
eight, are succeeding, ending with the most or least significant bit accordingly. When a complete
frame is transmitted, a new frame can directly follow it, or the communication line can be set to
an idle (high) state.
The UDORDn bit in UCSRnC sets the frame format used by the USART in MSPIM mode. The
Receiver and Transmitter use the same setting. Note that changing the setting of any of these
bits will corrupt all ongoing communication for both the Receiver and Transmitter.
16-bit data transfer can be achieved by writing two data bytes to UDRn. A UART transmit com-
plete interrupt will then signal that the 16-bit value has been shifted out.
• 8-bit data with MSB first
• 8-bit data with LSB first
0
1
0
1
Data setup (TXD)
Data sample (RXD)
Data setup (TXD)
XCK
XCK
Data sample (RXD)
Figure
18-1. Data bits are shifted out and latched in on opposite edges of the XCKn
SPI Mode
Table
0
1
2
3
UCPOL=0
18-2. Note that changing the setting of any of these bits will corrupt
Leading Edge
Sample (Rising)
Setup (Rising)
Sample (Falling)
Setup (Falling)
Data setup (TXD)
Data sample (RXD)
Data setup (TXD)
Data sample (RXD)
XCK
XCK
AT90USB82/162
Trailing Edge
Setup (Falling)
Sample (Falling)
Sample (Rising)
Setup (Rising)
UCPOL=1
175

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