AT90USB162 Atmel Corporation, AT90USB162 Datasheet - Page 54

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AT90USB162

Manufacturer Part Number
AT90USB162
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of AT90USB162

Flash (kbytes)
16 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
22
Ext Interrupts
21
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
0.5
Eeprom (bytes)
512
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
5
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes

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54
AT90USB82/162
While the WDT prescaler allows only even division factors (2, 4, 8...), the WDT peripheral also
includes a clock divider that directly acts on the clock source. This divider handles odd division
factors (3, 5, 7). In combination with the prescaler, a large number of time-out values can be
obtained.
The divider factor change is also ruled by the secure timed sequence : first the WDE and WDCE
bits must be set, and then four cycles are available to load the new divider value into the
WDTCKD register. Be aware that after this operation WDE will still be set. So keep in mind the
importance of order of operations. When setting up the WDT in Interrupt mode with specific val-
ues of prescaler and divider, the divider register must be loaded before the prescaler register :
1. In the same operation, write a logic one to the Watchdog change enable bits WDCE
2. Within the next four clock cycles, write the WDE and Watchdog prescaler bits (WDP) as
1. Set WDCE and WDE
2. Load the divider factor into WDTCKD
3. Wait WDCE being automatically cleared (just wait 2 more cycles)
4. Set again WDCE and WDE
5. Clear WDE, set WDIE and load the prescaler factor into WDTCSR in a same operation
6. Now the system is properly configured for Interrupt only mode. Inverting the two opera-
and WDE. A logic one must be written to WDE regardless of the previous value of the
WDE bit and even if it will be cleared after the operation.
desired, but with the WDCE bit cleared. This must be done in one operation.
tions would have been resulted into “Reset and Interrupt mode” and needed a third
operation to clear WDE.
7707F–AVR–11/10

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