AT90USB647 Atmel Corporation, AT90USB647 Datasheet - Page 267

• Manufacturer Part Number: AT90USB647
• Manufacturer: Atmel Corporation

Specifications of AT90USB647

• Flash (kbytes): 64 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 48
• Ext Interrupts: 16
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device + OTG
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 10
• Input Capture Channels: 1
• Pwm Channels: 9
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

22. USB Device Operating modes
22.1
22.2
22.3
7593K–AVR–11/09
Introduction
Power-on and reset
Endpoint reset
The USB device controller supports full speed and low speed data transfers. In addition to the
default control endpoint, it provides six other endpoints, which can be configured in control, bulk,
interrupt or isochronous modes:
The controller starts in the “idle” mode. In this mode, the pad consumption is reduced to the
minimum.
The next diagram explains the USB device controller main states on power-on:
Figure 22-1. USB device controller states after reset
The reset state of the Device controller is:
The D+ or D- pull-up will be activated as soon as the DETACH bit is cleared and VBUS is
present.
The macro is in the ‘Idle’ state after reset with a minimum power consumption and does not
need to have the PLL activated to enter in this state.
The USB device controller can at any time be reset by clearing USBE (disable USB interface).
An endpoint can be reset at any time by setting in the UERST register the bit corresponding to
the endpoint (EPRSTx). This resets:
• Endpoint 0:programmable size FIFO up to 64 bytes, default control endpoint
• Endpoints 1 programmable size FIFO up to 256 bytes in ping-pong mode.
• Endpoints 2 to 6: programmable size FIFO up to 64 bytes in ping-pong mode.
• the macro clock is stopped in order to minimize the power consumption (FRZCLK set),
• the USB device controller internal state is reset (all the registers are reset to their default
• the endpoint banks are reset
• the D+ or D- pull up are not activated (mode Detach)
• the internal state machine on that endpoint,
• the Rx and Tx banks are cleared and their internal pointers are restored,
value. Note that DETACH is set.)
RESET
HW
USBE=0
Reset
USBE=0
state>
<any
other
USBE=1
UID=1
Idle
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