AT90USB647 Atmel Corporation, AT90USB647 Datasheet - Page 402
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AT90USB647
Manufacturer Part Number
AT90USB647
Description
Manufacturer
Atmel Corporation
Specifications of AT90USB647
Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
48
Ext Interrupts
16
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device + OTG
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
10
Input Capture Channels
1
Pwm Channels
9
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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Table 30-2.
Notes:
402
Symbol
t
t
t
t
t
t
HIGH
SU;STA
HD;DAT
SU;DAT
SU;STO
BUF
1. In AT90USB64/128, this parameter is characterized and not 100% tested.
2. Required only for f
3. C
4. f
5. This requirement applies to all AT90USB64/128 2-wire Serial Interface operation. Other devices connected to the 2-wire
6. The actual low period generated by the AT90USB64/128 2-wire Serial Interface is (1/f
7. The actual low period generated by the AT90USB64/128 2-wire Serial Interface is (1/f
AT90USB64/128
Serial Bus need only obey the general f
than 6 MHz for the low time requirement to be strictly met at f
ment will not be strictly met for f
communicate at full speed (400 kHz) with other AT90USB64/128 devices, as well as any other device with a proper t
acceptance margin.
Parameter
High period of the SCL clock
Set-up time for a repeated START condition
Data hold time
Data setup time
Setup time for STOP condition
Bus free time between a STOP and START
condition
CK
b
= capacitance of one bus line in pF.
= CPU clock frequency
2-wire Serial Bus Requirements (Continued)
Figure 30-3. 2-wire Serial Bus Timing
SCL
SCL
SDA
> 100 kHz.
t
SU;STA
SCL
> 308 kHz when f
SCL
requirement.
t
HD;STA
t
t
of
LOW
CK
f
f
f
f
f
f
= 8 MHz. Still, AT90USB64/128 devices connected to the bus may
f
f
f
f
f
f
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
SCL
Condition
t
HIGH
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
≤ 100 kHz
> 100 kHz
SCL
t
HD;DAT
= 100 kHz.
t
LOW
t
SU;DAT
SCL
SCL
250
100
Min
4.0
0.6
4.7
0.6
4.0
0.6
4.7
1.3
0
0
- 2/f
- 2/f
CK
CK
), thus f
), thus the low time require-
t
SU;STO
CK
t
r
3.45
Max
0.9
must be greater
–
–
–
–
–
–
–
–
–
–
7593K–AVR–11/09
t
BUF
LOW
Units
µs
µs
µs
µs
µs
µs
ns
ns
µs
µs
µs
µs
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