SAM9RL64 Atmel Corporation, SAM9RL64 Datasheet - Page 7
SAM9RL64
Manufacturer Part Number
SAM9RL64
Description
Manufacturer
Atmel Corporation
Datasheets
1.M40800.pdf
(284 pages)
2.SAM9260.pdf
(290 pages)
3.SAM9261.pdf
(248 pages)
4.SAM9R64.pdf
(903 pages)
5.SAM9R64.pdf
(52 pages)
Specifications of SAM9RL64
Flash (kbytes)
0 Kbytes
Pin Count
217
Max. Operating Frequency
240 MHz
Cpu
ARM926
Hardware Qtouch Acquisition
No
Max I/o Pins
118
Ext Interrupts
118
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
1
Twi (i2c)
2
Uart
5
Ssc
2
Sd / Emmc
1
Graphic Lcd
Yes
Video Decoder
No
Camera Interface
No
Adc Channels
6
Adc Resolution (bits)
10
Adc Speed (ksps)
220
Resistive Touch Screen
Yes
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
64
Self Program Memory
NO
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.08 to 1.32
Fpu
No
Mpu / Mmu
No / Yes
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
No
- M40800 PDF datasheet
- SAM9260 PDF datasheet #2
- SAM9261 PDF datasheet #3
- SAM9R64 PDF datasheet #4
- SAM9R64 PDF datasheet #5
- Current page: 7 of 248
- Download datasheet (2Mb)
List of Tables
ARM926EJ-S Technical Reference Manual
ARM DDI0198D
Table 2-1
Table 2-2
Table 2-3
Table 2-4
Table 2-5
Table 2-6
Table 2-7
Table 2-8
Table 2-9
Table 2-10
Table 2-11
Table 2-12
Table 2-13
Table 2-14
Table 2-15
Table 2-16
Table 2-17
Table 2-18
Table 2-19
Table 2-20
Table 2-21
Table 2-22
Change history .............................................................................................................. ii
CP15 register summary ............................................................................................ 2-3
Address types in ARM926EJ-S ................................................................................. 2-4
CP15 abbreviations ................................................................................................... 2-5
Reading from register c0 ........................................................................................... 2-7
Register 0, ID code ................................................................................................... 2-8
Ctype encoding ......................................................................................................... 2-9
Cache size encoding (M=0) .................................................................................... 2-10
Cache associativity encoding (M=0) ....................................................................... 2-10
Line length encoding ............................................................................................... 2-11
Example Cache Type Register format .................................................................... 2-11
Control bit functions register c1 ............................................................................... 2-13
Effects of Control Register on caches ..................................................................... 2-15
Effects of Control Register on TCM interface .......................................................... 2-16
Domain access control defines ............................................................................... 2-18
FSR bit field descriptions ........................................................................................ 2-19
FSR status field encoding ....................................................................................... 2-20
Function descriptions register c7 ............................................................................ 2-21
Cache operations c7 ............................................................................................... 2-22
Register c8 TLB operations ..................................................................................... 2-25
Cache Lockdown Register instructions ................................................................... 2-27
Cache Lockdown Register L bits ............................................................................. 2-28
TCM Region Register instructions .......................................................................... 2-29
Copyright © 2001-2003 ARM Limited. All rights reserved.
vii
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