SAM3S8B Atmel Corporation, SAM3S8B Datasheet - Page 635

• Manufacturer Part Number: SAM3S8B
• Manufacturer: Atmel Corporation

29.11.5
Name:
Address:
Access:
Reset:
TWI_CWGR is only used in Master mode.
• CLDIV: Clock Low Divider
The SCL low period is defined as follows:
• CHDIV: Clock High Divider
The SCL high period is defined as follows:
• CKDIV: Clock Divider
The CKDIV is used to increase both SCL high and low periods.
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
T
T
low
high
=
=
31
23
15
–
7
(
(
(
(
CLDIV
CHDIV
TWI Clock Waveform Generator Register
TWI_CWGR
0x40018010 (0), 0x4001C010 (1)
Read-write
0x00000000
×
×
2
2
CKDIV
CKDIV
30
22
14
–
6
)
)
+
+
4 )
4 )
×
×
T
T
MCK
MCK
29
21
13
–
5
28
20
12
–
4
CHDIV
CLDIV
27
19
11
–
3
26
18
10
–
2
CKDIV
SAM3S8/SD8
SAM3S8/SD8
25
17
–
9
1
24
16
–
8
0
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