SAM3S8B Atmel Corporation, SAM3S8B Datasheet - Page 683

• Manufacturer Part Number: SAM3S8B
• Manufacturer: Atmel Corporation

31.5.2.3
Figure 31-5. Receiver Ready
31.5.2.4
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
RXRDY
URXD
S
Receiver Ready
Receiver Overrun
D0
D1
D2
Figure 31-3. Start Bit Detection
Figure 31-4. Character Reception
When a complete character is received, it is transferred to the UART_RHR and the RXRDY sta-
tus bit in UART_SR (Status Register) is set. The bit RXRDY is automatically cleared when the
receive holding register UART_RHR is read.
If UART_RHR has not been read by the software (or the Peripheral Data Controller or DMA
Controller) since the last transfer, the RXRDY bit is still set and a new character is received, the
OVRE status bit in UART_SR is set. OVRE is cleared when the software writes the control regis-
ter UART_CR with the bit RSTSTA (Reset Status) at 1.
Sampling Clock
Baud Rate
D3
Example: 8-bit, parity enabled 1 stop
Sampling
URXD
Clock
URXD
D4
D5
0.5 bit
period
True Start Detection
D6
period
1 bit
D7
D0
P
D1
True Start
Detection
S
D2
Read UART_RHR
D0
D3
D1
D4
D2
D3
D5
D4
D6
D5
SAM3S8/SD8
SAM3S8/SD8
D7
D6
Parity Bit
D7
P
D0
Stop Bit
683
683