SAM3S8B Atmel Corporation, SAM3S8B Datasheet - Page 846

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SAM3S8B

Manufacturer Part Number
SAM3S8B
Description
Manufacturer
Atmel Corporation
Datasheets
34.14.3
Name:
Address:
Access:
This register can only be written if the WPEN bit is cleared in
• DTOCYC: Data Timeout Cycle Number
These fields determine the maximum number of Master Clock cycles that the HSMCI waits between two data block trans-
fers. It equals (DTOCYC x Multiplier).
• DTOMUL: Data Timeout Multiplier
Multiplier is defined by DTOMUL as shown in the following table:
If the data time-out set by DTOCYC and DTOMUL has been exceeded, the Data Time-out Error flag (DTOE) in the HSMCI
Status Register (HSMCI_SR) rises.
846
846
31
23
15
7
SAM3S8/SD8
SAM3S8/SD8
Value
HSMCI Data Timeout Register
0
1
2
3
4
5
6
7
30
22
14
HSMCI_DTOR
0x40000008
Read-write
6
DTOMUL
1048576
65536
Name
1024
4096
29
21
13
128
256
5
16
1
28
20
12
4
Description
DTOCYC
DTOCYC x 16
DTOCYC x 128
DTOCYC x 256
DTOCYC x 1024
DTOCYC x 4096
DTOCYC x 65536
DTOCYC x 1048576
“HSMCI Write Protect Mode Register” on page
27
19
11
3
26
18
10
2
DTOCYC
25
17
9
1
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
868.
24
16
8
0

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