SAM3S8B Atmel Corporation, SAM3S8B Datasheet - Page 944
SAM3S8B
Manufacturer Part Number
SAM3S8B
Description
Manufacturer
Atmel Corporation
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35.7.36
Name:
Address:
Access:
This register can only be written if the bits WPSWS2 and WPHWS2 are cleared in
page
• CPRE: Channel Pre-scaler
• CALG: Channel Alignment
0 = The period is left aligned.
1 = The period is center aligned.
• CPOL: Channel Polarity
0 = The OCx output waveform (output from the comparator) starts at a low level.
1 = The OCx output waveform (output from the comparator) starts at a high level.
944
944
0b0000
0b0001
0b0010
0b0011
0b0100
0b0101
0b0110
0b0111
0b1000
0b1001
0b1010
0b1011
0b1100
939.
31
23
15
–
–
–
7
–
SAM3S8/SD8
SAM3S8/SD8
PWM Channel Mode Register
Value
PWM_CMRx [x=0..3]
0x40020200 [0], 0x40020220 [1], 0x40020240 [2], 0x40020260 [3]
Read-write
30
22
14
–
–
–
6
–
MCK
MCK_DIV_2
MCK_DIV_4
MCK_DIV_8
MCK_DIV_16
MCK_DIV_32
MCK_DIV_64
MCK_DIV_128
MCK_DIV_256
MCK_DIV_512
MCK_DIV_1024
CLKA
CLKB
29
21
13
–
–
–
5
–
Name
28
20
12
–
–
–
4
–
Master clock
Master clock/2
Master clock/4
Master clock/8
Master clock/16
Master clock/32
Master clock/64
Master clock/128
Master clock/256
Master clock/512
Master clock/1024
Clock A
Clock B
27
19
11
–
–
–
3
DTLI
CES
“PWM Write Protect Status Register” on
26
18
10
–
2
Description
CPRE
CPOL
DTHI
25
17
–
9
1
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
CALG
DTE
24
16
–
8
0
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