AD7889 Analog Devices, AD7889 Datasheet - Page 18

• Manufacturer Part Number: AD7889
• Description: Low Voltage Controller for Touch Screens
• Manufacturer: Analog Devices

Specifications of AD7889

• Resolution (bits): 12bit
• # Chan: 6
• Sample Rate: 105kSPS
• Interface: I²C/Ser 2-Wire,Ser,SPI
• Analog Input Type: SE-Uni
• Ain Range: Uni Vdd
• Adc Architecture: SAR
• Pkg Type: CSP

AD7879/AD7889
AUX/VBAT/GPIO PIN
The AUX/VBAT/GPIO pin on the AD7879/AD7889 can be
programmed as an auxiliary input to the ADC, as a battery
monitoring input, or as a general-purpose digital input/output.
To select the auxiliary measurement, set the ADC channel
address to 011 (Bits[14:12] in Control Register 1, Address 0x01).
To select a battery measurement, set the ADC channel address
to 010. To select the GPIO function, set Bit 13 in Control
Register 2 (Address 0x02) to 1.
AUXILIARY INPUT
The AD7879/AD7889 have an auxiliary analog input, AUX.
When the auxiliary input function is selected, the signal on the
AUX pin (AUX/VBAT/GPIO) is connected directly to the ADC
input. This channel has a full-scale input range from 0 V to V
The ADC channel address for AUX is 011 (Bits[14:12] in
Control Register 1, Address 0x01), and the result is stored in
the AUX/VBAT result register (Address 0x0C).
BATTERY INPUT
The AD7879/AD7889 can monitor battery voltages from 0.5 V
to 5 V when the BAT measurement is selected. Figure 28 shows
a block diagram of a battery voltage monitored through the VBAT
pin. The voltage to the V
is maintained at the desired supply voltage via the dc-to-dc
converter, and the input to the converter is monitored. This
voltage on VBAT is divided by 4 internally, so that a 5 V battery
voltage is presented to the ADC as 1.25 V. To conserve power,
the divider circuit is on only during the sampling of a voltage on
VBAT. Note that the possible maximum input is 5 V.
The ADC channel address for VBAT is 010 (Bits[14:12] in
Control Register 1, Address 0x01), and the result is stored in
the AUX/VBAT result register (Address 0x0C).
The maximum battery voltage that the AD7879/AD7889 can
measure changes when a different reference voltage is used. The
maximum voltage that is measurable is V
voltage gives a full-scale output from the ADC. The battery
voltage can be calculated using the following formula:
VBAT (V) = [(Register Value) × V
0.5V TO 5V
BATTERY
Figure 28. Block Diagram of Battery Measurement Circuit
CC
CONVERTER
VBAT
DC-TO-DC
pin (V
12kΩ
4kΩ
CC
SW
0.125V TO 1.25V
/REF) of the AD7879/AD7889
CC
V
CC
CC
× 4]/4095
× 4 because this
ADC
Rev. C | Page 18 of 40
CC
.
LIMIT COMPARISON
The AUX measurement and the battery measurement can
be compared with high and low limits stored on chip. An
out-of-limit result generates an alarm output at the INT pin
( PENIRQ / INT / DAV ) when the INT function is enabled. The
high limit for both channels is stored in the AUX/VBAT high
limit register (Address 0x04), and the low limit is stored in the
AUX/VBAT low limit register (Address 0x05).
After a measurement from either AUX or VBAT is taken, it
is compared with the high and low limits. The out-of-limit
comparison sets a status bit in Control Register 3. Separate
status bits for the high limit and the low limit indicate which
limit was exceeded. The interrupt sources can be masked by
clearing the corresponding enable bit in Control Register 3.
GPIO
The AD7879/AD7889 have one general-purpose logic input/
output pin, GPIO (AUX/VBAT/GPIO). To enable GPIO, set Bit
13 in Control Register 2 to 1. If this bit is set to 0, the
AUX/VBAT function is active on the pin. If the GPIO is not
enabled, the other GPIO configuration bits have no effect.
The GPIO data bit is Bit 12 in Control Register 2.
Direction (Bit 11, Control Register 2, Address 0x02)
Bit 11 sets the direction of the GPIO pin (AUX/VBAT/GPIO).
When GPIO DIR = 0, the pin is an output. Setting or clearing
the GPIO data bit (Bit 12 in Control Register 2) outputs a value
on the GPIO pin.
When GPIO DIR = 1, the pin is an input. An input value on the
GPIO pin sets or clears the GPIO data bit (Bit 12 in Control
Register 2). GPIO data register bits are read-only when GPIO
DIR = 1.
Polarity (Bit 10, Control Register 2, Address 0x02)
When GPIO POL = 0, the GPIO pin is active low. When GPIO
POL = 1, the GPIO pin is active high. How this bit affects the
GPIO operation also depends on the GPIO DIR bit.
If GPIO POL = 1 and GPIO DIR = 1, a 1 at the input pin sets
the corresponding GPIO data register bit to 1. A 0 at the input
pin clears the corresponding GPIO data bit to 0.
If GPIO POL = 1 and GPIO DIR = 0, a 1 in the GPIO data
register bit puts a 1 on the corresponding GPIO output pin. A 0
in the GPIO data register bit puts a 0 on the GPIO output pin.
If GPIO POL = 0 and GPIO DIR = 1, a 1 at the input pin sets
the corresponding GPIO data bit to 0. A 0 at the input pin clears
the corresponding GPIO data bit to 1.
If GPIO POL = 0 and GPIO DIR = 0, a 1 in the GPIO data
register bit puts a 0 on the corresponding GPIO output pin. A 0
in the GPIO data register bit puts a 1 on the GPIO output pin.