AD7484 Analog Devices, AD7484 Datasheet - Page 8
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AD7484
Manufacturer Part Number
AD7484
Description
14-Bit, 3 MSPS SAR ADC
Manufacturer
Analog Devices
Datasheet
1.AD7484.pdf
(20 pages)
Specifications of AD7484
Resolution (bits)
14bit
# Chan
1
Sample Rate
3MSPS
Interface
Par
Analog Input Type
SE-Uni
Ain Range
Uni 2.5V
Adc Architecture
SAR
Pkg Type
QFP
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AD7484
Pin No.
40
41
42
43
44
45
Mnemonic
D14
CONVST
RESET
MODE2
MODE1
CLIP
Description
Data Output Bit for Overranging. If the overrange feature is not used, this pin should be pulled to DGND via
a 100 kΩ resistor.
Convert Start Logic Input. A conversion is initiated on the falling edge of the CONVST signal. The input track-
and-hold amplifier goes from track mode to hold mode, and the conversion process commences.
Reset Logic Input. An active low reset pulse must be applied to this pin after power-up to ensure correct
operation. A falling edge on this pin resets the internal state machine and terminates a conversion that may
be in progress. The contents of the offset register will also be cleared on this edge. Holding this pin low
keeps the part in a reset state.
Operating Mode Logic Input. See Table 8 for details.
Operating Mode Logic Input. See Table 8 for details.
Logic Input. A logic high on this pin enables output clipping. In this mode, any input voltage that is greater
than positive full scale or less than negative full scale will be clipped to all 1s or all 0s, respectively. Further
details are given in the Offset/Overrange section.
Rev. C | Page 8 of 20