AD7708 Analog Devices, AD7708 Datasheet - Page 42

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AD7708

Manufacturer Part Number
AD7708
Description
16-Bit 8/10-Channel, Low Voltage, Low Power, Sigma Delta ADC
Manufacturer
Analog Devices
Datasheet

Specifications of AD7708

Resolution (bits)
16bit
# Chan
10
Sample Rate
n/a
Interface
Ser,SPI
Analog Input Type
Diff-Uni,SE-Uni
Ain Range
(2Vref/PGA Gain) p-p
Adc Architecture
Sigma-Delta
Pkg Type
SOIC,SOP

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Converting Single-Ended Inputs
The AD7708/AD7718 generally operates in buffered mode. This
places a restriction of AGND + 100 mV to AVDD – 100 mV on
the absolute and common-mode voltages that can be applied to
any input on the AD7708/AD7718.
Some applications may require the measurement of analog
inputs with respect to AGND. To enable the AD7708/AD7718
to be used in these single-ended applications, the buffer on the
AINCOM can be bypassed. The NEGBUF bit in the mode
register controls the operation of the input buffer on the AINCOM
input when a channel is configured for pseudo-differential mode of
operation. If cleared, the analog negative input (AINCOM) is
unbuffered, allowing it to be tied to AGND in single-ended
input configuration. If this bit is set, the analog negative input
(AINCOM) is buffered, placing a restriction on its common-
mode input range. When AINCOM is unbuffered, signals with a
common-mode range from AGND – 30 mV to AVDD + 30 mV
can be accommodated on this input allowing the end user to
connect the AINCOM input to AGND and perform single-
ended measurements with respect to this input. This unbuffered
input path on the AINCOM provides a dynamic load to the
driving source. Therefore, resistor/capacitor combinations on
this input pin can cause dc gain errors, depending on the output
impedance of the source that is driving the AINCOM input. All
analog inputs still operate in buffered mode and their com-
mon-mode and absolute input voltage is restricted to a range
between AGND + 100 mV and AV
AD7708/AD7718
DD
– 100 mV.
Combined Ratiometric and Absolute Value Measurement
System
The AD7708/AD7718 when operated with CHCON = 0 can be
configured for operation as four fully-differential analog inputs or
eight pseudo-differential analog inputs with two fully-differential
reference inputs. Having the ability to use either REFIN1 or
REFIN2 with any channel during the conversion process allows
the end user to make both absolute and ratiometric measure-
ments as shown in Figure 27. In this example a fully-differential
analog input (AIN1–AIN2) is being converted from a bridge trans-
ducer in a ratiometric manner using REFIN1 as the reference
input for this channel. AIN3 is configured as a pseudo-differential
input channel using REFIN2 to perform an absolute measurement
on the potentiometer. The REFSEL bit in the mode register is
used to select which reference is used with the active channel
during the conversion process. When the AD7708/AD7718 is
configured with CHCON = 1, only one reference (REFIN1) is
available. The contents of the CHCON bit override the REFSEL
bit. If the ADC is configured in five fully-differential or 10
pseudo-differential input channel mode, the REFSEL bit setting
is irrelevant as only REFIN1 is available.
EXCITATION VOLTAGE = 4V
WIPER
REFIN1(+)
AIN1
AIN2
REFIN1(–)
REFIN2(+)
AIN3
AINCOM
REFIN2(–)
AD7718
GND

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