AD5306 Analog Devices, AD5306 Datasheet

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AD5306

Manufacturer Part Number
AD5306
Description
Manufacturer
Analog Devices
Datasheet

Specifications of AD5306

Resolution (bits)
8bit
Dac Update Rate
167kSPS
Dac Settling Time
6µs
Max Pos Supply (v)
+5.5V
Single-supply
Yes
Dac Type
Voltage Out
Dac Input Format
I2C/Ser 2-wire,Ser

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FEATURES
AD5306: 4 buffered, 8-bit DACs in 16-lead TSSOP
A version: ±1 LSB INL; B version: ±0.625 LSB INL
AD5316: 4 buffered, 10-bit DACs in 16-lead TSSOP
A version: ±4 LSB INL; B version: ±2.5 LSB INL
AD5326: 4 buffered, 12-bit DACs in 16-lead TSSOP
A version: ±16 LSB INL; B version: ±10 LSB INL
Low power operation: 400 μA @ 3 V, 500 μA @ 5 V
2-wire (I
2.5 V to 5.5 V power supply
Guaranteed monotonic by design over all codes
Power-down to 90 nA @ 3 V, 300 nA @ 5 V (PD pin or bit)
Double-buffered input logic
Buffered/unbuffered reference input options
Output range: 0 V to V
Power-on reset to 0 V
Simultaneous update of outputs (LDAC pin)
Software clear facility
Data readback facility
On-chip rail-to-rail output buffer amplifiers
Temperature range −40°C to +105°C
APPLICATIONS
Portable battery-powered instruments
Digital gain and offset adjustment
Programmable voltage and current sources
Programmable attenuators
Industrial process control
1
Rev. F
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
Protected by U.S. Patent Numbers 5,969,657 and 5,684,481.
2
C®-compatible) serial interface
REF
or 0 V to 2 V
REF
Quad Voltage Output, 8-/10-/12-Bit DACs
2.5 V to 5.5 V, 400 μA, 2-Wire Interface,
GENERAL DESCRIPTION
The AD5306/AD5316/AD5326
voltage output DACs in 16-lead TSSOP packages that operate
from a single 2.5 V to 5.5 V supply, consuming 500 μA at 3 V.
Their on-chip output amplifiers allow rail-to-rail output swing
with a slew rate of 0.7 V/μs. A 2-wire serial interface, which
operates at clock rates up to 400 kHz, is used. This interface is
SMBus-compatible at V
placed on the same bus.
Each DAC has a separate reference input that can be configured
as buffered or unbuffered. The outputs of all DACs can be
updated simultaneously using the asynchronous LDAC input.
The parts incorporate a power-on reset circuit that ensures the
DAC outputs power up to 0 V and remain there until a valid
write to the device takes place. The software clear function
clears all DACs to 0 V. The parts contain a power-down feature
that reduces the current consumption of the device to
300 nA @ 5 V (90 nA @ 3 V).
All three parts have the same pinout, which allows users to select
the amount of resolution appropriate for their application without
redesigning their circuit board.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
LDAC
SDA
SCL
A1
A0
AD5306/AD5316/AD5326
POWER-ON
RESET
LDAC
INTERFACE
FUNCTIONAL BLOCK DIAGRAM
LOGIC
AD5306/AD5316/AD5326
© 2005 Analog Devices, Inc. All rights reserved.
REGISTER
REGISTER
REGISTER
REGISTER
DD
INPUT
INPUT
INPUT
INPUT
< 3.6 V. Multiple devices can be
V
DD
Figure 1.
1
REGISTER
REGISTER
REGISTER
REGISTER
are quad 8-/10-/12-bit buffered
DAC
DAC
DAC
DAC
V
V
REF
REF
STRING
STRING
STRING
STRING
DAC C
DAC D
DAC A
DAC B
A
D
V
V
REF
REF
B
C
www.analog.com
BUFFER
BUFFER
BUFFER
BUFFER
POWER-DOWN
LOGIC
PD
GND
V
V
V
V
OUT
OUT
OUT
OUT
A
C
D
B

Related parts for AD5306

AD5306 Summary of contents

Page 1

... FEATURES AD5306: 4 buffered, 8-bit DACs in 16-lead TSSOP A version: ±1 LSB INL; B version: ±0.625 LSB INL AD5316: 4 buffered, 10-bit DACs in 16-lead TSSOP A version: ±4 LSB INL; B version: ±2.5 LSB INL AD5326: 4 buffered, 12-bit DACs in 16-lead TSSOP A version: ±16 LSB INL; B version: ±10 LSB INL Low power operation: 400 μ ...

Page 2

... Load DAC Input LDAC ............................................................. 19 Power-Down Mode .................................................................... 19 Applications..................................................................................... 20 Typical Application Circuit....................................................... 20 Driving V from the Reference Voltage ................................ 20 DD Bipolar Operation Using the AD5306/AD5316/AD5326..... 20 Multiple Devices on One Bus ................................................... 20 AD5306/AD5316/AD5326 as a Digitally Programmable Window Detector ....................................................................... 21 Coarse and Fine Adjustment Using the AD5306/AD5316/AD5326 ....................................................... 21 Power Supply Decoupling ............................................................. 22 Outline Dimensions ...

Page 3

... V − 0.001 V − 0.001 DD DD 0.5 0.5 Rev Page AD5306/AD5316/AD5326 unless otherwise noted. MIN MAX 1 Max Unit Conditions/Comments Bits ±0.625 LSB ±0.25 LSB Guaranteed monotonic by design over all codes. Bits ±2.5 LSB ± ...

Page 4

... See the Terminology section specifications tested with the outputs unloaded. 4 Linearity is tested using a reduced code range: AD5306 (Code 8 to 255); AD5316 (Code 28 to 1023); AD5326 (Code 115 to 4095). 5 This corresponds to x codes deadband voltage/LSB size. 6 Guaranteed by design and characterization; not production tested. ...

Page 5

... Rev Page AD5306/AD5316/AD5326 unless otherwise noted. MAX Conditions/Comments REF DD 1/4 scale to 3/4 scale change (0x40 to 0xC0) 1/4 scale to 3/4 scale change (0x100 to 0x300) 1/4 scale to 3/4 scale change (0x400 to 0xC00) 1 LSB change around major carry ± 0.1 V p-p, unbuffered mode ...

Page 6

... AD5306/AD5316/AD5326 1 TIMING CHARACTERISTICS 5.5 V; all specifications T DD Table Versions Parameter 2 Limit MIN MAX 100 300 250 11 0 300 0. 400 400 B 1 See Figure 2. ...

Page 7

... 0 maximum rating conditions for extended periods may affect −0 0 device reliability. −40°C to +105°C −65°C to +150°C 150°C (T max − T )/θ 150.4°C/W 220°C 10 sec to 40 sec Rev Page AD5306/AD5316/AD5326 ...

Page 8

... Address Input. Sets the LSB of the 7-bit slave address Address Input. Sets the second LSB of the 7-bit slave address. LDAC SCL OUT AD5306/ AD5316 SDA OUT AD5326 GND OUT TOP VIEW (Not to Scale ...

Page 9

... Total Harmonic Distortion (THD) The difference between an ideal sine wave and its attenuated version using the DAC. The sine wave is used as the reference for the DAC, and the THD is a measure of the harmonics present on the DAC output. THD is measured in dB. Rev Page AD5306/AD5316/AD5326 ...

Page 10

... AD5306/AD5316/AD5326 OUTPUT IDEAL VOLTAGE ACTUAL NEGATIVE OFFSET DAC CODE ERROR LOWER DEADBAND CODES AMPLIFIER FOOTROOM NEGATIVE OFFSET ERROR Figure 4. Transfer Function with Negative Offset GAIN ERROR PLUS OFFSET ERROR OUTPUT VOLTAGE POSITIVE OFFSET ERROR Figure 5. Transfer Function with Positive Offset (V Rev Page ...

Page 11

... TYPICAL PERFORMANCE CHARACTERISTICS 1 25° 0.5 0 –0.5 –1 100 150 CODE Figure 6. AD5306 INL 25° –1 –2 –3 0 200 400 600 CODE Figure 7. AD5316 INL 25° –4 –8 –12 0 500 1000 ...

Page 12

... TEMPERATURE (°C) Figure 13. AD5306 INL and DNL Error vs. Temperature 1 REF 0.5 0 GAIN ERROR –0.5 –1.0 – TEMPERATURE (°C) Figure 14. AD5306 Offset Error and Gain Error vs. Temperature 3.5 4.0 4.5 5.0 REF MAX INL MIN DNL 80 120 OFFSET ERROR 80 120 Rev Page 0 25°C A ...

Page 13

... C CH1 2V, CH2 200mV, TIME BASE = 200μs/DIV 5.0 5 REF CH1 CH2 CH1 500mV, CH2 5V, TIME BASE = 1μs/DIV 4.0 4.5 5.0 Rev Page AD5306/AD5316/AD5326 = 25° OUT SCL = 25° OUT Figure 22. Power-On Reset 25°C ...

Page 14

... AD5306/AD5316/AD5326 350 400 450 500 I (μA) DD Figure 24. I Histogram with and 2.50 2.49 2.48 2.47 1μs/DIV Figure 25. AD5326 Major Code Transition Glitch Energy 10 0 –10 –20 –30 –40 –50 –60 10 100 1k 10k FREQUENCY (Hz) Figure 26. Multiplying Bandwidth (Small-Signal Frequency Response – ...

Page 15

... D = REF V OUT N 2 where the decimal equivalent of the binary code that is loaded to the DAC register 255 for AD5306 (8 bits 1023 for AD5316 (10 bits 4095 for AD5326 (12 bits the DAC resolution REF REFERENCE BUFFER BUF DAC ...

Page 16

... DAC outputs while the device is powering up. SERIAL INTERFACE The AD5306/AD5316/AD5326 are controlled via an I compatible serial bus. These devices are connected to this bus as slave devices; that is, no clock is generated by the AD5306/ AD5316/AD5326 DACs. This interface is SMBus-compatible at V < 3.6 V. ...

Page 17

... Because there are individual bits in the pointer byte for each DAC possible to write the same data and control bits to two, three, or four DACs simultaneously by setting the relevant bits to 1. MOST SIGNIFICANT DATA BYTE MSB 8-BIT AD5306 GAIN BUF CLR PD 10-BIT AD5316 ...

Page 18

... AD5306/AD5316/AD5326 WRITE OPERATION When writing to the AD5306/AD5316/AD5326 DACs, the user must begin with an address byte ( 0), after which the DAC acknowledges that it is prepared to receive data by pulling SDA low. This address byte is followed by the pointer byte, which is also acknowledged by the DAC. Two bytes of data are then written to the DAC, as shown in Figure 33 ...

Page 19

... LDAC was low. Normally, when LDAC is low, the DAC registers are filled with the contents of the input registers. In the AD5306/AD5316/AD5326, the part updates the DAC register only if the input register has been changed since the last time the DAC register was updated, thereby removing unnecessary digital crosstalk ...

Page 20

... REFIN is the reference voltage input. With REFIN = kΩ, MULTIPLE DEVICES ON ONE BUS Figure 38 shows four AD5306 devices on the same serial bus. Each has a different slave address since the states of the A0 and A1 pins are different. This allows each of 16 DACs to be written to or read from independently ...

Page 21

... ADDITIONAL PINS OMITTED FOR CLARITY Figure 39. Window Detection COARSE AND FINE ADJUSTMENT USING THE AD5306/AD5316/AD5326 Two of the DACs in the AD5306/AD5316/AD5326 can be paired together to form a coarse and fine adjustment function, as shown in Figure 40. DAC A is used to provide the coarse adjustment while DAC B provides the fine adjustment. Varying the ratio of R1 and R2 changes the relative effect of the coarse and fine adjustments ...

Page 22

... If the AD5306/AD5316/AD5326 system where multiple devices require an AGND-to-DGND connection, the connection should be made at one point only. The star ground point should be established as close as possible to the device. The AD5306/ AD5316/AD5326 should have ample supply bypassing of 10 μF in parallel with 0.1 μF on the supply located as close to the package as possible, ideally right up against the device. The 10 μ ...

Page 23

... GAIN 6 Yes Yes 7 Yes 8 Yes Yes 8 Yes Yes 6 7 Yes Yes 8 Yes Yes 8 6 Yes 7 7 Yes 8 Rev Page AD5306/AD5316/AD5326 Package Pins HBEN CLR Yes TSSOP 20 Yes TSSOP 20 Yes TSSOP 24 Yes Yes TSSOP 20 Yes TSSOP 20 Yes TSSOP 24 Yes TSSOP 28 Yes ...

Page 24

... AD5306ARUZ 1 −40°C to +105°C 1 AD5306ARUZ-REEL7 −40°C to +105°C AD5306BRU −40°C to +105°C AD5306BRU-REEL −40°C to +105°C AD5306BRU-REEL7 −40°C to +105°C 1 AD5306BRUZ −40°C to +105°C 1 AD5306BRUZ-REEL −40°C to +105°C 1 AD5306BRUZ-REEL7 −40°C to +105°C AD5316ARU − ...

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