AD9752 Analog Devices, AD9752 Datasheet - Page 14

• Manufacturer Part Number: AD9752
• Manufacturer: Analog Devices

Specifications of AD9752

• Resolution (bits): 12bit
• Dac Update Rate: 125MSPS
• Dac Settling Time: 35ns
• Max Pos Supply (v): +5.5V
• Single-supply: Yes
• Dac Type: Current Out
• Dac Input Format: Par

AD9752
The center tap on the primary side of the transformer must be
connected to ACOM to provide the necessary dc current path
for both IOUTA and IOUTB. The complementary voltages
appearing at IOUTA and IOUTB (i.e., V
swing symmetrically around ACOM and should be maintained
with the specified output compliance range of the AD9752. A
differential resistor, R
which the output of the transformer is connected to the load,
R
mined by the transformer’s impedance ratio and provides the
proper source termination which results in a low VSWR. Note
that approximately half the signal power will be dissipated across
R
DIFFERENTIAL USING AN OP AMP
An op amp can also be used to perform a differential to single-
ended conversion as shown in Figure 29. The AD9752 is con-
figured with two equal load resistors, R
differential voltage developed across IOUTA and IOUTB is
converted to a single-ended signal via the differential op amp
configuration. An optional capacitor can be installed across
IOUTA and IOUTB forming a real pole in a low-pass filter.
The addition of this capacitor also enhances the op amps distor-
tion performance by preventing the DACs high slewing output
from overloading the op amp’s input.
The common-mode rejection of this configuration is typically
determined by the resistor matching. In this circuit, the differ-
ential op amp circuit is configured to provide some additional
signal gain. The op amp must operate off of a dual supply since
its output is approximately 1.0 V. A high speed amplifier such
as the AD8055 or AD9632 capable of preserving the differential
performance of the AD9752 while meeting other system level
objectives (i.e., cost, power) should be selected. The op amps
differential gain, its gain setting resistor values, and full-scale
output swing capabilities should all be considered when opti-
mizing this circuit.
The differential circuit shown in Figure 30 provides the neces-
sary level-shifting required in a single supply system. In this
case, AVDD which is the positive analog supply for both the
AD9752 and the op amp is also used to level-shift the differ-
ential output of the AD9752 to midsupply (i.e., AVDD/2). The
AD8041 is a suitable op amp for this application.
LOAD
DIFF
Figure 29. DC Differential Coupling Using an Op Amp
Figure 28. Differential Output Using a Transformer
.
, via a passive reconstruction filter or cable. R
AD9752
IOUTA
IOUTB
AD9752
IOUTA
IOUTB
25
DIFF
, may be inserted in applications in
C
OPT
OPTIONAL R
25
MINI-CIRCUITS
225
225
T1-1T
LOAD
DIFF
OUTA
, of 25 . The
500
and V
AD8055
500
R
LOAD
DIFF
OUTB
is deter-
)
–14–
SINGLE-ENDED UNBUFFERED VOLTAGE OUTPUT
Figure 31 shows the AD9752 configured to provide a unipolar
output range of approximately 0 V to +0.5 V for a doubly termi-
nated 50
20 mA flows through the equivalent R
case, R
IOUTA or IOUTB. The unused output (IOUTA or IOUTB)
can be connected to ACOM directly or via a matching R
Different values of I
the positive compliance range is adhered to. One additional
consideration in this mode is the integral nonlinearity (INL) as
discussed in the ANALOG OUTPUT section of this data sheet.
For optimum INL performance, the single-ended, buffered
voltage output configuration is suggested.
SINGLE-ENDED, BUFFERED VOLTAGE OUTPUT
CONFIGURATION
Figure 32 shows a buffered single-ended output configuration in
which the op amp U1 performs an I-V conversion on the AD9752
output current. U1 maintains IOUTA (or IOUTB) at a virtual
ground, thus minimizing the nonlinear output impedance effect
on the DAC’s INL performance as discussed in the ANALOG
OUTPUT section. Although this single-ended configuration
typically provides the best dc linearity performance, its ac distor-
tion performance at higher DAC update rates may be limited by
U1’s slewing capabilities. U1 provides a negative unipolar out-
put voltage and its full-scale output voltage is simply the
product of R
within U1’s voltage output swing capabilities by scaling I
and/or R
result with a reduced I
required to sink will be subsequently reduced.
Figure 30. Single-Supply DC Differential Coupled Circuit
Figure 31. 0 V to +0.5 V Unbuffered Voltage Output
AD9752
LOAD
AD9752
FB
IOUTA
IOUTB
. An improvement in ac distortion performance may
cable since the nominal full-scale current, I
represents the equivalent load resistance seen by
IOUTA
IOUTB
FB
and I
25
OUTFS
I
OUTFS
OUTFS
OUTFS
C
OPT
25
= 20mA
and R
. The full-scale output should be set
since the signal current U1 will be
25
LOAD
225
225
50
can be selected as long as
LOAD
1k
of 25 . In this
AD8041
V
500
OUTA
50
1k
= 0 TO +0.5V
OUTFS
LOAD
OUTFS
AVDD
REV. 0
, of
.