AD9752 Analog Devices, AD9752 Datasheet - Page 18

• Manufacturer Part Number: AD9752
• Manufacturer: Analog Devices

Specifications of AD9752

• Resolution (bits): 12bit
• Dac Update Rate: 125MSPS
• Dac Settling Time: 35ns
• Max Pos Supply (v): +5.5V
• Single-supply: Yes
• Dac Type: Current Out
• Dac Input Format: Par

AD9752
Figure 39 shows the AD9752 reconstructing a wideband, or
W-CDMA test vector with a bandwidth of 5 MHz, centered at
15.625 MHz and being sampled at 62.5 MSPS. ACP for the given
test vector is measured at 70 dB.
Figure 39. CDMA Signal, Sampled at 65 MSPS, Adjacent
Channel Power >70 dBm
It is also possible to generate a QAM signal completely in the
digital domain via a DSP or ASIC, in which case only a single
DAC of sufficient resolution and performance is required to
reconstruct the QAM signal. Also available from several vendors
are Digital ASICs which implement other digital modulation
schemes such as PSK and FSK. This digital implementation has
the benefit of generating perfectly matched I and Q components
in terms of gain and phase, which is essential in maintaining
optimum performance in a communication system. In this imple-
mentation, the reconstruction DAC must be operating at a
sufficiently high clock rate to accommodate the highest specified
–100
–110
–120
–20
–30
–40
–50
–60
–70
–80
–90
CENTER 16.384MHz
Q DATA
R
2k
I DATA
INPUT
INPUT
FSADJ
SET1
REFIO
CLK
CL1
0.1 F
REFIO
REFLO
(“Q DAC”)
(“I DAC”)
AD9752
AD9752
LATCHES
LATCHES
CO
1.4096MHz
1.9k
R
SET2
FSADJ
DVDD
AVDD
ACOM
CO
R
220
Figure 38. CDMA Transmit Application Using AD9752
CAL
DAC
DAC
U2
U1
REFLO
SLEEP
AVDD
QOUTA
QOUTB
IOUTB
CU1
IOUTA
DCOM
SPAN 14.096MHz
AVDD
100W
100
100
C
FILTER
500
500
100
500
500
500
–18–
500
500
CONTROL
+3V
GAIN
TXOPP
TXOPN
LOIPP
LOIPN
QAM carrier frequency. Figure 40 shows a block diagram of
such an implementation using the AD9752.
AD9752 EVALUATION BOARD
General Description
The AD9752-EB is an evaluation board for the AD9752 12-bit
D/A converter. Careful attention to layout and circuit design
combined with a prototyping area allow the user to easily and
effectively evaluate the AD9752 in any application where high
resolution, high speed conversion is required.
This board allows the user the flexibility to operate the AD9752
in various configurations. Possible output configurations include
transformer coupled, resistor terminated, inverting/noninverting
and differential amplifier outputs. The digital inputs are designed
to be driven directly from various word generators, with the
on-board option to add a resistor network for proper load
termination. Provisions are also made to operate the AD9752
with either the internal or external reference, or to exercise the
power-down feature.
Refer to the application note AN-420 for a thorough description
and operating instructions for the AD9752 evaluation board.
FREQUENCY
634
CARRIER
500
Q DATA
I DATA
REFIN
VGAIN
IIPP
IIPN
IIQP
IIQN
CONTROL
FACTOR
2
12
SCALE
12
GAIN
12
COMPENSATION
TEMPERATURE
Figure 40. Digital QAM Architecture
SPLITTER
SIN
PHASE
STEL-1130
STEL-1177
12
AD6122
QAM
NCO
12
COS
CLOCK
12
AD9752
V
CC
50
V
CC
LPF
REV. 0
50
TO
MIXER