ST7LITE25F2 STMicroelectronics, ST7LITE25F2 Datasheet - Page 106

• Manufacturer Part Number: ST7LITE25F2
• Description: 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI
• Manufacturer: STMicroelectronics

Specifications of ST7LITE25F2

• 8 Kbytes Single Voltage Flash Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55˚C.
• Clock Sources: Internal 1% RC oscillator, crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-Halt, Wait and Slow, Auto Wake Up From Halt

ST7LITE2
13.8 I/O PORT PIN CHARACTERISTICS
13.8.1 General Characteristics
Subject to general operating conditions for V
Notes:
1. Data based on characterization results, not tested in production.
2. Configuration not recommended, all unused pins must be kept at a fixed voltage: using the output mode of the I/O for
example or an external pull-up or pull-down resistor (see
based on design simulation and technology characteristics, not tested in production. This value depends on V
perature values.
3. The R
scribed in
4. To generate an external interrupt, a minimum pulse width has to be applied on an I/O port pin configured as an external
interrupt source.
Figure 67. Two typical applications with unused I/O Pin
Figure 68. Typical I
106/133
Symbol
t
t
t
r(IO)out
f(IO)out
w(IT)in
V
R
C
V
V
I
I
hys
PU
S
IH
L
IO
IL
(external pull-up of 10k mandatory in noisy environment. This is to avoid entering ICC mode unexpectedly during a reset.
Caution: During normal operation the ICCCLK pin must be pulled-up, internally or externally
Note: I/O can be left unconnected if it is configured as output (0 or 1) by the software. This has the advantage of greater EMC
robustness and lower cost.
PU
90
80
70
60
50
40
30
20
10
Figure
0
2
Input low level voltage
Input high level voltage
Schmitt trigger voltage
hysteresis
Input leakage current
Static current consumption induced
by each floating input pin
Weak pull-up equivalent resistor
I/O pin capacitance
Output high to low level fall time
Output low to high level rise time
External interrupt pulse time
pull-up equivalent resistor is based on a resistive transistor (corresponding I
TO BE CHARACTERIZED
2.5
68).
Ta=1 40°C
Ta=9 5°C
Ta=2 5°C
Ta=-45 °C
3
V
1)
DD
PU
3.5
Parameter
10kΩ
vs. V
Vdd(V)
4
DD
4.5
UNUSED I/O PORT
with V
2)
5
4)
5.5
ST7XXX
IN
3)
1)
1)
=V
6
SS
V
Floating input mode
V
SS
C
Between 10% and 90%
DD
SS
IN
L
=50pF
=
, f
≤
V
V
OSC
Figure
IN
Conditions
V
V
≤
DD
DD
V
, and T
DD
=5V
=3V
67). Static peak current value taken at a fixed V
A
unless otherwise specified.
10kΩ
V
0.7xV
SS
Min
50
1
UNUSED I/O PORT
- 0.3
DD
ST7XXX
PU
Typ
400
400
120
160
25
25
5
current characteristics de-
V
0.3xV
DD
Max
250
±1
+ 0.3
DD
DD
and tem-
IN
Unit
t
mV
CPU
µA
kΩ
pF
ns
V
value,