ST7LITE25F2 STMicroelectronics, ST7LITE25F2 Datasheet - Page 99

• Manufacturer Part Number: ST7LITE25F2
• Description: 8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, TIMERS, SPI
• Manufacturer: STMicroelectronics

Specifications of ST7LITE25F2

• 8 Kbytes Single Voltage Flash Program Memory With Read-out Protection, In-circuit Programming And In-application Programming (icp And Iap). 10k Write/erase Cycles Guaranteed, Data Retention: 20 years at 55˚C.
• Clock Sources: Internal 1% RC oscillator, crystal/ceramic resonator or external clock
• Five Power Saving Modes: Halt, Active-Halt, Wait and Slow, Auto Wake Up From Halt

13.4 SUPPLY CURRENT CHARACTERISTICS
The following current consumption specified for
the ST7 functional operating modes over tempera-
ture range does not take into account the clock
source current consumption. To get the total de-
13.4.1 Supply Current
T
Notes:
1. CPU running with memory access, all I/O pins in input mode with a static value at V
in reset state; clock input (CLKIN) driven by external square wave, LVD disabled.
2. All I/O pins in input mode with a static value at V
driven by external square wave, LVD disabled.
3. SLOW mode selected with f
V
4. SLOW-WAIT mode selected with f
V
5. All I/O pins in output mode with a static value at V
tested in production at V
6. All I/O pins in input mode with a static value at V
max.
7. This consumption refers to the Halt period only and not the associated run period which is software dependent.
Figure 60. Typical I
Symbol
SS
DD
A
I
DD
= -40 to +85°C unless otherwise specified,
(no load), all peripherals in reset state; clock input (CLKIN) driven by external square wave, LVD disabled.
or V
9.0
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0
SS
Supply current in RUN mode
Supply current in WAIT mode
Supply current in SLOW mode
Supply current in SLOW WAIT mode
Supply current in HALT mode
Supply current in AWUFH mode
2.0
(no load), all peripherals in reset state; clock input (CLKIN) driven by external square wave, LVD disabled.
2.5
8Mhz
4Mhz
1Mhz
3.0
DD
Parameter
DD
3.5
in RUN vs. f
max and f
Vdd (V)
CPU
4.0
based on f
4.5
CPU
CPU
5)
5.0
CPU
based on f
max.
6)7)
5.5
OSC
divided by 32. All I/O pins in input mode with a static value at V
DD
6.0
DD
External Clock, f
Internal RC, f
f
External Clock, f
Internal RC, f
f
f
f
-40°C≤T
T
T
CPU
CPU
CPU
CPU
SS
A
A
OSC
V
= +125°C
= +25°C
or V
or V
DD
(no load), LVD disabled. Data based on characterization results,
=8MHz
=8MHz
=250kHz
=250kHz
=5.5V
divided by 32. All I/O pins in input mode with a static value at
SS
SS
A
≤+85°C
(no load), all peripherals in reset state; clock input (CLKIN)
(no load). Data tested in production at V
vice consumption, the two current values must be
added (except for HALT mode for which the clock
is stopped).
Figure 61. Typical I
1)
2)
Conditions
CPU
CPU
3)
4)
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
CPU
CPU
=1MHz
=1MHz
2
=1MHz
=1MHz
2.5
250Khz
125Khz
62.5Hz
1)
2)
3
DD
DD
3.5
or V
in SLOW vs. f
Vdd (V)
1
2.2
7.5
0.8
1.8
3.7
1.6
1.6
1
15
20
SS
4
Typ
(no load), all peripherals
4.5
12
6
2.5
2.5
10
50
30
DD
Max
5
max. and f
CPU
ST7LITE2
5.5
Unit
99/133
mA
µA
DD
6
CPU
or
1