ST72215G2 STMicroelectronics, ST72215G2 Datasheet - Page 118
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ST72215G2
Manufacturer Part Number
ST72215G2
Description
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY,ADC, 16-BIT TIMERS, SPI, I2C INTERFACES
Manufacturer
STMicroelectronics
Datasheet
1.ST72104G2.pdf
(141 pages)
Specifications of ST72215G2
Emulation Voltage
5.5 V
- Current page: 118 of 141
- Download datasheet (3Mb)
ST72104Gx, ST72215Gx, ST72216Gx, ST72254Gx
13.8 I/O PORT PIN CHARACTERISTICS
13.8.1 General Characteristics
Subject to general operating conditions for V
Figure 78. Two typical Applications with unused I/O Pin
Figure 79. Typical I
Notes:
1. Unless otherwise specified, typical data are based on T
2. Data based on characterization results, not tested in production.
3. Hysteresis voltage between Schmitt trigger switching levels. Based on characterization results, not tested.
4. Configuration not recommended, all unused pins must be kept at a fixed voltage: using the output mode of the I/O for
example or an external pull-up or pull-down resistor (see
characteristics, not tested in production.
5. The R
scribed in
6. Data based on characterization results, not tested in production.
7. To generate an external interrupt, a minimum pulse width has to be applied on an I/O port pin configured as an external
interrupt source.
118/141
Ipu [µA ]
70
60
50
40
30
20
10
Symbol
t
t
0
t
f(IO)out
r(IO)out
w(IT)in
V
R
C
V
V
I
I
hys
PU
S
IH
L
IO
IL
3.2
PU
Figure
Input low level voltage
Input high level voltage
Schmitt trigger voltage hysteresis
Input leakage current
Static current consumption
Weak pull-up equivalent resistor
I/O pin capacitance
Output high to low level fall time
Output low to high level rise time
External interrupt pulse time
pull-up equivalent resistor is based on a resistive transistor (corresponding I
Ta=-40°C
Ta=25°C
3.5
79). This data is based on characterization results, tested in production at V
V
DD
PU
Parameter
4
10kΩ
Vdd [V]
vs. V
Ta=85°C
Ta=125°C
DD
4.5
UNUSED I/O PORT
2)
2)
with V
4)
7)
ST72XXX
5
IN
5)
6)
6)
3)
=V
V
Floating input mode
V
C
Between 10% and 90%
SS
DD
SS
IN
L
=50pF
5.5
=
≤
, f
V
V
SS
OSC
IN
Conditions
Figure
A
≤
=25°C and V
V
, and T
DD
V
V
78). Data based on design simulation and/or technology
DD
DD
=5V
=3.4V
A
unless otherwise specified.
DD
10kΩ
=5V.
0.7xV
Min
170
62
1
UNUSED I/O PORT
DD
Typ
ST72XXX
PU
400
120
200
25
25
5
current characteristics de-
DD
1)
max.
0.3xV
Max
200
250
300
±1
DD
t
Unit
mV
CPU
µA
kΩ
pF
ns
V
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