ST72215G2 STMicroelectronics, ST72215G2 Datasheet - Page 38

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ST72215G2

Manufacturer Part Number
ST72215G2
Description
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY,ADC, 16-BIT TIMERS, SPI, I2C INTERFACES
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST72215G2

Emulation Voltage
5.5 V
ST72104Gx, ST72215Gx, ST72216Gx, ST72254Gx
MISCELLANEOUS REGISTERS (Cont’d)
MISCELLANEOUS REGISTER 2 (MISCR2)
Read / Write
Reset Value: 0000 0000 (00h)
Bit 7:4 = Reserved always read as 0
Bit 3 = MOD SPI Master Output Disable
This bit is set and cleared by software. When set, it
disables the SPI Master (MOSI) output signal.
0: SPI Master Output enabled.
1: SPI Master Output disabled.
Bit 2 = SOD SPI Slave Output Disable
This bit is set and cleared by software. When set it
disable the SPI Slave (MISO) output signal.
0: SPI Slave Output enabled.
1: SPI Slave Output disabled.
Bit 1 = SSM SS mode selection
This bit is set and cleared by software.
0: Normal mode - the level of the SPI SS signal is
1: I/O mode, the level of the SPI SS signal is read
Bit 0 = SSI SS internal mode
This bit replaces the SS pin of the SPI when the
SSM bit is set to 1. (see SPI description). It is set
and cleared by software.
Table 10. Miscellaneous Register Map and Reset Values
38/141
Address
input from the external SS pin.
from the SSI bit.
7
0
(Hex.)
0020h
0040h
0
MISCR1
Reset Value
MISCR2
Reset Value
Register
0
Label
0
MOD SOD SSM
IS11
7
0
0
IS10
6
0
0
SSI
0
MCO
5
0
0
IS01
4
0
0
MOD
IS00
3
0
0
SOD
CP1
2
0
0
SSM
CP0
1
0
0
SMS
SSI
0
0
0

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