71M6533G Maxim, 71M6533G Datasheet - Page 123
71M6533G
Manufacturer Part Number
71M6533G
Description
The Teridian™ 71M6533 and 71M6534 are third-generation polyphase metering systems-on-chips (SoCs) with a 10MHz 8051-compatible MPU core, low-power RTC, flash, and LCD driver
Manufacturer
Maxim
Datasheet
1.71M6533.pdf
(132 pages)
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6.9 Pin Descriptions
Pins marked with an asterisk (e.g. V2*) are only available on the 71M6534.
6.9.1 Power and Ground Pins
6.9.2 Analog Pins
Pin types: P = Power, O = Output, I = Input, I/O = Input/Output
The circuit number denotes the equivalent circuit, as specified under Section
Rev 2
GNDA
GNDD
V3P3A
V3P3SYS
V3P3D
VBAT
V2P5
IAP/IAN,
IBP/IBN,
ICP/ICN
IDP/IDN
VA, VB,
VC
V1
V2*
VBIAS*
VREF
XIN
XOUT
Name
Name
Type
Type Circuit Description
O
O
I
I
I
I
I
O
O
P
P
P
P
P
Circuit Description
6
6
7
7
9
9
8
13
12
10
–
–
–
–
Differential or single-ended Line Current Sense Inputs: These pins are voltage
inputs to the internal A/D converter. Typically, they are connected to the
outputs of current sensors. Unused pins must be tied to V3P3A.
Line Voltage Sense Inputs: These pins are voltage inputs to the internal
A/D converter. Typically, they are connected to the outputs of resistor
dividers. Unused pins must be tied to V3P3A.
Comparator Input: This pin is a voltage input to the internal comparator.
The voltage applied to the pin is compared to the internal BIAS voltage
(1.6 V). If the input voltage is above VBIAS, the comparator output will be
high (1). If the comparator output is low, a voltage fault will occur. A series
5 kΩ resistor should be connected from V1 to the resistor divider.
Comparator Input (71M6534 only): This pin is a voltage input to an internal
comparator. The voltage applied to this pin is compared to an internal
reference voltage (VBIAS). If the input voltage is above VBIAS, the
comparator output will be high (1).
Low-impedance output for use in biasing current sensors and voltage dividers.
Voltage Reference for the ADC. This pin should be left unconnected
(floating).
Crystal Inputs: A 32 kHz crystal should be connected across these pins.
Typically, a 33 pF capacitor is also connected from XIN to GNDA and a
7 pF capacitor (alternatively, 10 pF to 15 pF) is connected from XOUT
to GNDA. It is important to minimize the capacitance between these pins.
See the crystal manufacturer datasheet for details.
If an external clock is used, a 150 mV (p-p) clock signal should be applied
to XIN, and XOUT should be left unconnected.
Analog ground: This pin should be connected directly to the ground plane.
Digital ground: This pin should be connected directly to the ground plane.
Analog power supply: A 3.3 V power supply should be connected to this
pin, must be the same voltage as V3P3SYS.
System 3.3 V supply. This pin should be connected to a 3.3 V power supply.
Auxiliary voltage output of the chip. In mission mode, this pin is con-
nected to V3P3SYS by the internal selection switch. In BROWNOUT
mode, it is internally connected to VBAT. V3P3D is floating in LCD and
SLEEP mode. A bypass capacitor to ground should not exceed 0.1 µF.
Battery backup and oscillator power supply. A battery or super-capacitor
is to be connected between VBAT and GNDD. If no battery is used,
connect VBAT to V3P3SYS.
Output of the internal 2.5 V regulator. A 0.1 µF capacitor to GNDA
should be connected to this pin.
Table 91: Power and Ground Pins
Table 92: Analog Pins
6.9.4 I/O Equivalent Circuits.
123
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