71M6533G Maxim, 71M6533G Datasheet - Page 81

• Manufacturer Part Number: 71M6533G
• Description: The Teridian™ 71M6533 and 71M6534 are third-generation polyphase metering systems-on-chips (SoCs) with a 10MHz 8051-compatible MPU core, low-power RTC, flash, and LCD driver
• Manufacturer: Maxim

FDS_6533_6534_004
Rev 2
RTCADJ_H 201C
RTCADJ_M 201D
RTCADJ_L
LCD_MAP6
LCDX
LCDY
LCD_MAP0 2023
…
LCD_MAP5 2028
LCD0
…
LCD41
LCD_BLNK 205A
RTC0
RTC1
RTC2
RTC3
RTC4
RTC5
RTC6
WE
Area Reserved for Factory Test:
RTM0H
RTM0L
RTM1H
RTM1L
RTM2H
RTM2L
RTM3H
RTM3L
LCD Display Interface:
Name
†
Address
2015
2016
2017
2018
2019
201A
201B
201E
201F
2020
2021
…
2029
2030
…
2059
2060
2061
2062
2063
2064
2065
2066
2067
See the detailed description for LCD_BITMAP[ ] in
See the detailed description for LCD_SEG[ ] in
MUX_SYNC_E
Bit 7
U
U
U
U
U
U
U
U
LCD_Y
LCD_BLKMAP19[3:0]
Bit 6
BME
U
U
U
U
U
U
U
LCD_E
R (0)
Bit 5
RTC write protect register (write data is discarded)
U
U
U
U
U
PREG[5:0]
U
U
U
U
Table 54: I/O RAM Description – Alphabetical
R (0)
Table 54: I/O RAM Description – Alphabetical
Bit 4
U
U
U
RTC_YR[7:0]
PREG[13:6]
RTM0[7:0]
RTM1[7:0]
RTM2[7:0]
RTM3[7:0]
LCD_MODE[2:0]
Bit 3
U
U
U
RTC_SEC[5:0]
RTC_MIN[5:0]
RTC_DATE[2:0]
RTC_HR[4:0]
71M6533/G/H and 71M6534/H Data Sheet
LCD_BLKMAP18[3:0]
Bit 2
U
RTC_MO[3:0]
RTC_DAY[2:0]
PREG[16:14]
Bit 1
U
LCD_CLK[1:0]
QREG[1:0]
RTM0[9:8]
RTM1[9:8]
RTM2[9:8]
RTM3[9:8]
Bit 0
U
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