71M6533G Maxim, 71M6533G Datasheet - Page 42

• Manufacturer Part Number: 71M6533G
• Description: The Teridian™ 71M6533 and 71M6534 are third-generation polyphase metering systems-on-chips (SoCs) with a 10MHz 8051-compatible MPU core, low-power RTC, flash, and LCD driver
• Manufacturer: Maxim

drive an external LED for transmitting data on an optical link. The pin OPT_RX has the same threshold
as the RX pin, but can also be used to sense the input from an external photo detector used as the receiver
for the optical link. OPT_TX and OPT_RX are connected to a dedicated UART port (UART1).
when system power is present (i.e. not in BROWNOUT mode). The OPT_TXMOD bit enables modulation.
The duty cycle is controlled by OPT_FDC[1:0], which can select 50%, 25%, 12.5%, and 6.25% duty cycle. A
6.25% duty cycle means OPT_TX is low for 6.25% of the period.
1.5.6 Optical Interface
The device includes an interface to implement an IR/optical port. The pin OPT_TX is designed to directly
The OPT_TX and OPT_RX pins can be inverted with configuration bits OPT_TXINV and OPT_RXINV,
respectively. Additionally, the OPT_TX output may be modulated at 38 kHz. Modulation is available
When not needed for the optical UART, the OPT_TX pin can alternatively be configured as DIO2,
WPULSE, or VARPULSE. The configuration bits are OPT_TXE[1:0]. Likewise, OPT_RX can alternately
be configured as DIO_1. Its control is OPT_RXDIS.
In the 71M6534, a multiplexer allows the selection of alternate pins DIO18/MTX and DIO22/RTX for
UART1. This function is controlled with the UMUX_E and UMUX_SEL bits in I/O RAM.
1.5.7 Digital I/O
The device includes up to 40 pins (71M6533) or 53 pins (71M6534) of general purpose digital I/O. These
pins are compatible with 5 V inputs (no current limiting resistors are needed). The Digital I/O pins can be
categorized as follows:
•
•
•
42
from
OPT_TX UART
A
B
Dedicated DIO pins (5 pins): DIO3, DIO56, DIO57, DIO58, PB
DIO/LCD segment pins
DIO pins combined with other functions (2 pins): DIO2/OPT_TX, DIO1/OPT_RX
o
o
A total of 33 pins for the 71M6533:
A total of 46 pins for the 71M6534:
DIO4/SEG24 - DIO11/SEG31 (8 pins)
DIO13/SEG33 - DIO21/SEG41 (9 pins)
DIO23/SEG43 – DIO27/SEG47 (5 pins)
DIO29/SEG49 - DIO30/SEG50 (2 pins)
DIO41/SEG61 (1 pin)
DIO43/SEG63 - DIO45/SEG65 (3 pins)
DIO47/SEG67 – DIO51/SEG71 (5 pins)
DIO4/SEG24 – DIO30/SEG50 (27 pins)
DIO36/SEG56 – DIO39/SEG59 (4 pins)
DIO41/SEG61 – DIO55/SEG75 (15 pins)
OPT_TXMOD = 0
OPT_TXINV
OPT_TXMOD
OPT_FDC
Figure 8: Optical Interface
A
EN
MOD
2
DUTY
VARPULSE
B
WPULSE
A
DIO2
Figure 8
B
OPT_FDC = 2 (25%)
OPT_TXMOD = 1,
OPT_TXE[1:0]
0
3
2
1
illustrates the OPT_TX generator.
1/38kHz
Internal
OPT_TX
V3P3
Rev 2